EEWORLDEEWORLDEEWORLD

Part Number

Search

LT6220IS8#TR

Description
Precision Amplifier LT6220 - Single 60MHz, 20V/- s Low Power, Rail-to-Rail Input and Output Precision Op Amps
CategoryAnalog mixed-signal IC    Amplifier circuit   
File Size358KB,22 Pages
ManufacturerADI
Websitehttps://www.analog.com
Download Datasheet Parametric Compare View All

LT6220IS8#TR Overview

Precision Amplifier LT6220 - Single 60MHz, 20V/- s Low Power, Rail-to-Rail Input and Output Precision Op Amps

LT6220IS8#TR Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
package instructionSOP-8
Reach Compliance Codecompliant
ECCN codeEAR99
Amplifier typeOPERATIONAL AMPLIFIER
Maximum average bias current (IIB)0.9 µA
Nominal Common Mode Rejection Ratio100 dB
Maximum input offset voltage3500 µV
JESD-30 codeR-PDSO-G8
JESD-609 codee0
length4.9025 mm
Humidity sensitivity level1
Negative supply voltage upper limit-6.3 V
Nominal Negative Supply Voltage (Vsup)-5 V
Number of functions1
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)255
Certification statusNot Qualified
Maximum seat height1.752 mm
Nominal slew rate15 V/us
Supply voltage upper limit6.3 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyBIPOLAR
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
Nominal Uniform Gain Bandwidth50000 kHz
width3.899 mm
Base Number Matches1
FeaTures
n
n
n
n
n
n
n
n
n
n
n
n
n
n
n
LT6220/LT6221/LT6222
Single/Dual/Quad 60MHz,
20V/µs, Low Power, Rail-to-Rail Input
and Output Precision Op Amps
DescripTion
The
LT
®
6220/LT6221/LT6222
are single/dual/quad, low
power, high speed rail-to-rail input and output operational
amplifiers with excellent DC performance. The LT6220/
LT6221/LT6222 feature reduced supply current, lower
input offset voltage, lower input bias current and higher
DC gain than other devices with comparable bandwidth.
Typically, the LT6220/LT6221/LT6222 have an input offset
voltage of less than 100µV, an input bias current of less than
15nA and an open-loop gain of 100V/mV. The parts have
an input range that includes both supply rails and an output
that swings within 10mV of either supply rail to maximize
the signal dynamic range in low supply applications.
The LT6220/LT6221/LT6222 maintain performance for
supplies from 2.2V to 12.6V and are specified at 3V, 5V
and ±5V supplies. The inputs can be driven beyond the
supplies without damage or phase reversal of the output.
The LT6220 is housed in the 8-lead SO package with the
standard op amp pinout as well as the 5-lead SOT-23
package. The LT6221 is available in 8-lead SO and DFN
(3mm
×
3mm low profile dual fine pitch leadless) packages
with the standard op amp pinout. The LT6222 features the
standard quad op amp configuration and is available in
the 16-lead SSOP package. The LT6220/LT6221/LT6222
can be used as plug-in replacements for many op amps
to improve input/output range and performance.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property
of their respective owners.
n
n
Gain Bandwidth Product: 60MHz
Input Common Mode Range Includes Both Rails
Output Swings Rail-to-Rail
Low Quiescent Current: 1mA Max
Input Offset Voltage: 350µV Max
Input Bias Current: 150nA Max
Wide Supply Range: 2.2V to 12.6V
Large Output Current: 50mA Typ
Low Voltage Noise: 10nV√Hz Typ
Slew Rate: 20V/µs Typ
Common Mode Rejection: 102dB Typ
Power Supply Rejection: 105dB Typ
Open-Loop Gain: 100V/mV Typ
Operating Temperature Range: –40°C to 85°C
Single in the 8-Lead SO and 5-Lead Low Profile
(1mm) ThinSOT™ Packages
Dual in the 8-Lead SO and (3mm
×
3mm) DFN
Packages
Quad in the 16-Lead SSOP Package
applicaTions
n
n
n
n
n
n
Low Voltage, High Frequency Signal Processing
Driving A/D Converters
Rail-to-Rail Buffer Amplifiers
Active Filters
Video Amplifiers
Fast Current Sensing Amplifiers
Typical applicaTion
Stepped-Gain Photodiode Amplifier
V
S+
30pF
10k
PERCENT OF UNITS (%)
50
40
35
30
25
20
15
10
5
0
–250
3.24k
V
OS
Distribution, V
CM
= 0V
(S8, PNP Stage)
V
S
= 5V, 0V
45 V
CM
= 0V
V
S+
100k
I
PD
V
S+
1pF
PHOTODIODE
~4pF
LT6220
V
S–
33k
LT1634-1.25
V
OUT
+
V
S–
V
S
= ±1.5V TO ±5V
V
OUT
= 0V TO –1.25V, TRANSIMPEDANCE = 100k
V
OUT
< –1.25V, TRANSIMPEDANCE = (100k || 3.24k) = 3.14k
622012 TA01a
–150
150
–50 0 50
INPUT OFFSET VOLTAGE (µV)
250
622012fc
622012 TA01b
For more information
www.linear.com/LT6220/LT6221/LT6222
1

LT6220IS8#TR Related Products

LT6220IS8#TR LT6222CGN LT6222CGN#TR LT6221CS8#TR LT6221CDD#TR LT6221IS8#TR LT6221IDD#TR LT6220IS5#TR
Description Precision Amplifier LT6220 - Single 60MHz, 20V/- s Low Power, Rail-to-Rail Input and Output Precision Op Amps Precision Amplifiers LT6222 - Quad 60MHz, 20V/- s Low Power, Rail-to-Rail Input and Output Precision Op Amp Precision Amplifiers LT6222 - Quad 60MHz, 20V/- s Low Power, Rail-to-Rail Input and Output Precision Op Amp Precision Amplifiers LT6221 - Dual 60MHz, 20V/- s Low Power, Rail-to-Rail Input and Output Precision Op Amp Precision Amplifiers LT6221 - Dual 60MHz, 20V/- s Low Power, Rail-to-Rail Input and Output Precision Op Amp Precision Amplifier LT6221 - Dual 60MHz, 20V/- s Low Power, Rail-to-Rail Input and Output Precision Op Amp Precision Amplifier LT6221 - Dual 60MHz, 20V/- s Low Power, Rail-to-Rail Input and Output Precision Op Amp Precision Amplifier LT6220 - Single 60MHz, 20V/- s Low Power, Rail-to-Rail Input and Output Precision Op Amps
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible
package instruction SOP-8 SSOP-16 SSOP, SOP, HVSON, SOP, HVSON, VSSOP,
Reach Compliance Code compliant not_compliant not_compliant not_compliant not_compliant not_compliant not_compliant not_compliant
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
Amplifier type OPERATIONAL AMPLIFIER OPERATIONAL AMPLIFIER OPERATIONAL AMPLIFIER OPERATIONAL AMPLIFIER OPERATIONAL AMPLIFIER OPERATIONAL AMPLIFIER OPERATIONAL AMPLIFIER OPERATIONAL AMPLIFIER
Maximum average bias current (IIB) 0.9 µA 0.8 µA 0.9 µA 0.8 µA 0.8 µA 0.9 µA 0.9 µA 0.9 µA
Nominal Common Mode Rejection Ratio 100 dB 100 dB 100 dB 100 dB 100 dB 100 dB 100 dB 100 dB
Maximum input offset voltage 3500 µV 3000 µV 3500 µV 3000 µV 3000 µV 3500 µV 3500 µV 4500 µV
JESD-30 code R-PDSO-G8 R-PDSO-G16 R-PDSO-G16 R-PDSO-G8 S-PDSO-N8 R-PDSO-G8 S-PDSO-N8 R-PDSO-G5
JESD-609 code e0 e0 e0 e0 e0 e0 e0 e0
length 4.9025 mm 4.8895 mm 4.8895 mm 4.9025 mm 3 mm 4.9025 mm 3 mm 2.9 mm
Humidity sensitivity level 1 1 1 1 1 1 1 1
Negative supply voltage upper limit -6.3 V -6.3 V -6.3 V -6.3 V -6.3 V -6.3 V -6.3 V -6.3 V
Nominal Negative Supply Voltage (Vsup) -5 V -5 V -5 V -5 V -5 V -5 V -5 V -5 V
Number of functions 1 4 4 2 2 2 2 1
Number of terminals 8 16 16 8 8 8 8 5
Maximum operating temperature 85 °C 70 °C 85 °C 70 °C 70 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C - -40 °C - - -40 °C -40 °C -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP SSOP SSOP SOP HVSON SOP HVSON VSSOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR SQUARE RECTANGULAR SQUARE RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) 255 235 235 235 NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED 255
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.752 mm 1.75 mm 1.75 mm 1.752 mm 0.8 mm 1.752 mm 0.8 mm 1 mm
Nominal slew rate 15 V/us 18 V/us 15 V/us 18 V/us 18 V/us 15 V/us 15 V/us 15 V/us
Supply voltage upper limit 6.3 V 6.3 V 6.3 V 6.3 V 6.3 V 6.3 V 6.3 V 6.3 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
surface mount YES YES YES YES YES YES YES YES
technology BIPOLAR BIPOLAR BIPOLAR BIPOLAR BIPOLAR BIPOLAR BIPOLAR BIPOLAR
Temperature level INDUSTRIAL COMMERCIAL INDUSTRIAL COMMERCIAL COMMERCIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form GULL WING GULL WING GULL WING GULL WING NO LEAD GULL WING NO LEAD GULL WING
Terminal pitch 1.27 mm 0.635 mm 0.635 mm 1.27 mm 0.5 mm 1.27 mm 0.5 mm 0.95 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature 40 20 20 20 NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED 40
Nominal Uniform Gain Bandwidth 50000 kHz 60000 kHz 50000 kHz 60000 kHz 60000 kHz 50000 kHz 50000 kHz 50000 kHz
width 3.899 mm 3.899 mm 3.899 mm 3.899 mm 3 mm 3.899 mm 3 mm 1.625 mm
Maker - ADI ADI ADI ADI ADI ADI ADI
Two DMAs share one PCI interrupt
In SOPC, there is one PCI and two DMAs. There is only one interrupt number on the PCI, but I want to hang the interrupts of both DMAs on the PCI. Is there any way to achieve this?...
le_bing Embedded System
Which senior can give me some advice?
I want to learn hardware but I am confused and have many questions. Can anyone add me on QQ172350594...
hjkl645 MCU
How to create static link library using GCCAVR
First compile the c file into a target file avr-gcc -c -mmcu=atmega16 filename.c Then make a static link library avr-ar -r libname.a filename.o Then link avr-gcc -mmcu=atmega16 otherfile.c libname.a -...
SUNKE9 Microchip MCU
Problems with placing pins for self-made components in proteldxp2004
How to change the direction of the pin when placing a self-made component in proteldxp2004? Is there any shortcut key? Thank you! Is it possible to set...
cjx19840106 PCB Design
A brief analysis of the use of ^,!,cxsf symbols and movs instructions in arm assembly
[font=新宋体][color=#0000cc].[/color][color=#0000ff]macro[/color] restore_user_regs ldr r1[color=#0000cc],[/color][color=#0000cc][[/color]sp[color=#0000cc],[/color] #S_PSR[color=#0000cc]][/color] ldr lr[...
程序天使 ARM Technology
[FPGA Learning Series—Differences between FPGA and CPLD]
I am a complete novice when it comes to FPGA. I have had a brief contact with CPLD. I used CPLD to make an IO expansion before. Now I think I have not even entered the door. I am ready to play with FP...
ltbytyn FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2311  1968  2255  1804  2556  47  40  46  37  52 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号