INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
•
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT4353
Triple 2-channel analog
multiplexer/demultiplexer with latch
Product specification
File under Integrated Circuits, IC06
December 1990
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
FEATURES
•
Wide analog input voltage range:
±
5 V
•
Low “ON” resistance:
80
Ω
(typ.) at V
CC
−
V
EE
= 4.5 V
70
Ω
(typ.) at V
CC
−
V
EE
= 6.0 V
60
Ω
(typ.) at V
CC
−
V
EE
= 9.0 V
•
Logic level translation:
to enable 5 V logic to communicate with
±
5 V analog
signals
•
Typical “break before make” built in
•
Address latches provided
•
Output capability: non-standard
•
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT4353 are high-speed Si-gate CMOS
devices. They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT4353 are triple 2-channel analog
multiplexers/demultiplexers with two common enable
inputs (E
1
and E
2
) and a latch enable input (LE). Each
QUICK REFERENCE DATA
V
EE
= GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
= 6 ns
74HC/HCT4353
multiplexer has two independent inputs/outputs (nY
0
and
nY
1
), a common input/output (nZ) and select inputs (S
1
to
S
3
).
Each multiplexer/demultiplexer contains two bidirectional
analog switches, each with one side connected to an
independent input/output (nY
0
and nY
1
) and the other side
connected to a common input/output (nZ).
With E
1
LOW and E
2
HIGH, one of the two switches is
selected (low impedance ON-state) by S
1
to S
3
.
The data at the select inputs may be latched by using the
active LOW latch enable input (LE). When LE is HIGH, the
latch is transparent. When either of the two enable inputs,
E
1
(active LOW) and E
2
(active HIGH), is inactive, all
analog switches are turned off.
V
CC
and GND are the supply voltage pins for the digital
control inputs (S
1
to S
3
, LE, E
1
and E
2
). The V
CC
to GND
ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT.
The analog inputs/outputs (nY
0
and nY
1
, and nZ) can
swing between V
CC
as a positive limit and V
EE
as a
negative limit. V
CC
−
V
EE
may not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, V
EE
is
connected to GND (typically ground).
TYPICAL
SYMBOL
t
PZH
/ t
PZL
t
PHZ
/ t
PLZ
C
I
C
PD
C
S
PARAMETER
turn “ON” time E
1
, E
2
or S
n
to V
os
turn “OFF” time E
1
, E
2
or S
n
to V
os
input capacitance
power dissipation capacitance per switch
max. switch capacitance
independent (Y)
common (Z)
Notes
1. C
PD
is used to determine the dynamic power
dissipation (P
D
in
µW):
P
D
=
C
PD
×
V
CC2
×
f
i
+
∑
{(C
L
+ C
S
)
×
V
CC2
×
f
o
} where:
f
i
= input frequency in MHz
C
L
= output load capacitance in pF
f
o
= output frequency in MHz
C
S
= max. switch capacitance in pF
December 1990
2
5
8
5
8
pF
pF
notes 1 and 2
CONDITIONS
HC
C
L
= 50 pF; R
L
= 1 kΩ;
V
CC
= 5 V
29
20
3.5
23
HCT
21
22
3.5
23
ns
ns
pF
pF
UNIT
∑
{(C
L
×C
S
)
×
V
CC2
×
f
o
} = sum of outputs
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
−
1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package
Information”.
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
PIN DESCRIPTION
PIN NO.
2, 1
5
6, 4
3, 14
7
8
9
10
11
15, 13, 12
16, 17
18
19
20
SYMBOL
2Y
0
, 2Y
1
3Z
3Y
0
, 3Y
1
n.c.
E
1
E
2
V
EE
GND
LE
S
1
to S
3
1Y
0
, 1Y
1
1Z
2Z
V
CC
NAME AND FUNCTION
independent inputs/outputs
common input/output
independent inputs/outputs
not connected
enable input (active LOW)
enable input (active HIGH)
negative supply voltage
ground (0 V)
latch enable input (active LOW)
select inputs
independent inputs/outputs
common input/output
common input/output
positive supply voltage
74HC/HCT4353
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
FUNCTION TABLE
INPUTS
E
1
H
X
L
L
L
X
Notes
1. Last selected channel “ON”.
2. Selected channels latched.
H = HIGH voltage level
L = LOW voltage level
X = don’t care
↓
= HIGH-to-LOW LE transition
APPLICATIONS
•
Analog multiplexing and demultiplexing
•
Digital multiplexing and demultiplexing
•
Signal gating
E
2
H
L
H
H
H
X
LE
X
X
H
H
L
↓
S
n
X
X
L
H
X
X
CHANNEL
ON
none
none
nY0
−
nZ
nY
1
−
nZ
(1)
(2)
74HC/HCT4353
Fig.4 Functional diagram.
Fig.5 Schematic diagram (one switch).
December 1990
4
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Voltages are referenced to V
EE
= GND (ground = 0 V)
SYMBOL
V
CC
±I
IK
±I
SK
±I
S
±I
EE
±I
CC
;
±I
GND
T
stg
P
tot
PARAMETER
DC supply voltage
DC digital input diode current
DC switch diode current
DC switch current
DC V
EE
current
DC V
CC
or GND current
storage temperature range
power dissipation per package
plastic DIL
plastic mini-pack (SO)
P
S
power dissipation per switch
750
500
100
mW
mW
mW
−65
MIN.
−0.5
MAX.
+11.0
20
20
25
20
50
+150
UNIT
V
mA
mA
mA
mA
mA
°C
CONDITIONS
74HC/HCT4353
for V
I
< −0.5
V or V
I
>
V
CC
+ 0.5 V
for V
S
< −0.5
V or V
S
>
V
CC
+ 0.5 V
for
−0.5
V
<
V
S
<
V
CC
+ 0.5 V
for temperature range:
−40
to +125
°C
74HC/HCT
above +70
°C:
derate linearly with 12 mW/K
above +70
°C:
derate linearly with 8 mW/K
Note to ratings
1. To avoid drawing V
CC
current out of terminals nZ, when switch current flows in terminals nY
n
, the voltage drop across
the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminals nZ, no V
CC
current will flow
out of terminals nY
n
. In this case there is no limit for the voltage drop across the switch, but the voltages at nY
n
and
nZ may not exceed V
CC
or V
EE
.
RECOMMENDED OPERATING CONDITIONS
74HC
SYMBOL PARAMETER
min. typ.
V
CC
V
CC
V
I
V
S
T
amb
T
amb
t
r
, t
f
DC supply voltage V
CC
−GND
DC supply voltage V
CC
−V
EE
DC input voltage range
DC switch voltage range
operating ambient temperature range
operating ambient temperature range
input rise and fall times
6.0
2.0
2.0
GND
V
EE
−40
−40
5.0
5.0
max.
10.0
10.0
V
CC
V
CC
+85
+125
1000
500
400
250
min.
4.5
2.0
GND
V
EE
−40
−40
typ. max.
5.0
5.0
5.5
10.0
V
CC
V
CC
+85
V
V
V
V
°C
see DC and AC
CHARACTER-
ISTICS
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
CC
= 10.0 V
see Figs 6 and 7
see Figs 6 and 7
74HCT
UNIT
CONDITIONS
+125
°C
6.0
500
ns
December 1990
5
DSP and ARM Processors
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