6-Bit, 75Ω Digital Step Attenuator
5MHz to 3GHz
Description
The F1978 Digital Step Attenuator (DSA) is a product in IDT’s
Glitch-Free
TM
DSA Family, which is optimized for the demanding
requirements of CATV and satellite systems. It operates in the
frequency range of 5MHz to 3000MHz. This device is offered in a
compact 4mm
4mm, 20-pin Thin QFN package with a 75Ω
impedance for ease of integration.
The F1978 DSA has RF performance identical to the F1975
Digital Step Attenuator. The difference between the F1978 and
F1975 is that the F1978 has an additional programming mode
called Direct Serial Programming. Consult the “Programming”
section of this datasheet or the application note AN-945
“Comparison of F1975 and F1978 Digital Step Attenuator
Serial Programming Methods.”
Datasheet
F1978
Features
Advantages
Digital step attenuators are used in receivers and transmitters to
provide gain control. The F1978 is a 6-bit step attenuator optimized
for these demanding applications. The silicon design has very low
insertion loss and low distortion (+64dBm IIP3). The device has
pinpoint attenuation accuracy. Most importantly, the F1978
includes IDT’s
Glitch-Free
TM
technology, which results in low over-
shoot and ringing during most significant bit (MSB) transitions.
Frequency: 5MHz to 3000MHz
Serial and 6-bit parallel interface
31.5dB control range
0.5dB step
Glitch-Free
TM
technology, low transient overshoot
3.0V to 5.25V supply
1.8V or 3.3V control logic
Attenuator step error: 0.1dB at 1GHz
Low insertion loss: 1.2dB at 1GHz
Ultra-linear IIP3: +64dBm
IIP2: +125dBm typical
Stable integral non-linearity over temperature
Low current consumption: 550µA typical
Bi-directional
Operating temperature: -40°C to +105°C
4mm
4mm, 20-TQFN package
Block Diagram
Figure 1.
Block Diagram
Glitch-Free
TM
technology protects the power amplifier or
analog-to-digital converter (ADC) from damage during
transitions between attenuation states
Extremely accurate attenuation levels
Ultra-low distortion
Low insertion loss for best signal-to-noise ratio (SNR)
Allows direct serial programming of attenuation
Glitch-Free
TM
RF1
RF2
Typical Applications
Bias
Decoder
SPI
CATV infrastructure
CATV set-top boxes
CATV satellite modems
Data network equipment
Fiber networks
D[5:0]
DATA
CLK
V
DD
© 2017 Integrated Device Technology, Inc.
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V
MODE
Rev O August 28, 2017
LE
F1978 Datasheet
Pin Assignments
Figure 2.
Pin Assignments for 4mm
4mm
0.75mm, 20-TQFN Package – Top View (Through Package)
NC
D0
D1
D2
20
19
18
17
16
D5
D3
1
15
D4
RF1
2
14
RF2
V
MODE
DATA
3
Exposed Pad
13
CLK
4
12
NC
LE
5
11
GND
6
7
8
9
10
NC
NC
NC
© 2017 Integrated Device Technology, Inc.
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GND
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DD
Rev O August 28, 2017
F1978 Datasheet
Pin Descriptions
Table 1.
Pin Descriptions
Number
1
2
3
4
5
6
7–9, 12, 18
10, 11
13
14
15
16
17
19
20
Name
D5
RF1
DATA
CLK
LE
V
DD
NC
GND
V
MODE
RF2
D4
D3
D2
D1
D0
EPAD
Device RF input or output (bi-directional).
Serial interface data input.
Serial interface clock input.
Description
16dB attenuation control bit. This pin is activated by logic HIGH (see Table 12).
[a]
Serial interface latch enable input. Internal pull-up (100kΩ). See “Programming” section for proper
usage of this line.
Power supply pin.
No internal connection. The NC pins can be left unconnected, have a voltage applied, or be connected
to ground (recommended).
Internally grounded. Connect pin directly to paddle ground or as close as possible to the pin with thru
vias.
Pull this pin HIGH for Serial Control Mode. Ground this pin for Parallel Control Mode.
Device RF input or output (bi-directional).
8dB attenuation control bit. This pin is activated by logic HIGH (see Table 12).
[a]
4dB attenuation control bit. This pin is activated by logic HIGH (see Table 12).
[a]
2dB attenuation control bit. This pin is activated by logic HIGH (see Table 12).
[a]
1dB attenuation control bit. This pin is activated by logic HIGH (see Table 12).
[a]
0.5dB attenuation control bit. This pin is activated by logic HIGH (see Table 12).
[a]
Exposed paddle. Internally connected to ground (GND). Solder this exposed paddle to a printed circuit
board (PCB) pad that uses multiple ground vias to provide heat transfer out of the device into the PCB
ground planes. These multiple ground vias are also required to achieve the specified RF performance.
[a] There is a 100kΩ pull-up resistor to the internally regulated 2.5V power supply.
© 2017 Integrated Device Technology, Inc.
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Rev O August 28, 2017
F1978 Datasheet
Absolute Maximum Ratings
The absolute maximum ratings are stress ratings only. Stresses greater than those listed below can cause permanent damage to the device.
Functional operation of the F1978 at absolute maximum ratings is not implied. Exposure to absolute maximum rating conditions could affect
device reliability.
Table 2.
Absolute Maximum Ratings
Parameter
V
DD
to GND
DATA, LE, CLK, D[5:0], V
MODE
RF1, RF2
Maximum Input Power Applied to RF1 or RF2 (>100MHz)
Continuous Power Dissipation
Junction Temperature
Storage Temperature Range
Lead Temperature (soldering, 10s)
Electrostatic Discharge – HBM
(JEDEC/ESDA JS-001-2012)
Electrostatic Discharge – CDM
(JEDEC 22-C101F)
Symbol
V
DD
V
Logic
V
RF
P
RF
P
diss
T
J
T
STOR
Minimum
-0.3
-0.3
-0.3
Maximum
+5.5
Minimum
(V
DD
+0.3, 3.6)
+0.3
+34
1.75
+140
Units
V
V
V
dBm
dBm
°C
°C
°C
V
V
-65
+150
+260
2000
(Class 2)
500
(Class C2)
V
ESDHBM
V
ESDCDM
© 2017 Integrated Device Technology, Inc.
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F1978 Datasheet
Recommended Operating Conditions
Table 3.
Recommended Operating Conditions
Parameter
Supply Voltage(s)
Frequency Range
Operating Temperature Range
RF CW Input Power
RF1 Impedance
RF2 Impedance
Figure 3.
Symbol
V
DD
f
RF
T
EP
P
CW
Z
RF1
Z
RF2
Condition
Minimum
3.00
5
Typical
Maximum
5.25
3000
105
See Figure 3
Units
V
MHz
°C
dBm
Ω
Ω
Exposed paddle
RF1 or RF2
Single-ended
Single-ended
-40
75
75
Maximum Continuous Operating RF Input Power versus Input Frequency (+25C)
30
Maximum Operating Power (dBm)
28
26
24
22
20
18
16
14
12
10
8
0.01
0.1
1
10
100
1000
10000
+25 C - CW
Frequency (MHz)
© 2017 Integrated Device Technology, Inc.
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Rev O August 28, 2017
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