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3FN11G12.5000NVGC8

Description
Standard clock oscillator 3FG SERIES CRYSTAL FREE OSCILLATOR
CategoryPassive components    Frequency controller and a timer    oscillator    The standard clock oscillator   
File Size228KB,3 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
Environmental Compliance
Download Datasheet Parametric View All

3FN11G12.5000NVGC8 Overview

Standard clock oscillator 3FG SERIES CRYSTAL FREE OSCILLATOR

3FN11G12.5000NVGC8 Parametric

Parameter NameAttribute value
MakerIDT (Integrated Device Technology, Inc.)
Product CategoryStandard clock oscillator
frequency12.5 MHz
frequency stability50 PPM
load capacitance4 pF
Working power voltage2.5 V
Supply voltage - min.1.8 V
Supply voltage - max.3.3 V
Output formatCMOS
Termination typeSMD/SMT
Package/box2.5 mm x 2 mm
Minimum operating temperature0 C
Maximum operating temperature+ 70 C
length2.5 mm
width2 mm
high0.55 mm
EncapsulationCut Tape
EncapsulationReel
Current rating2 mA
Duty Cycle - Max55 %
Factory packaging quantity3000
Active Oscillators at the price of
Passive Crystals
Passive Crystals
Active Oscillators at the price
CrystalFree™ Solid-State Gen Purpose Oscillator
3FN
CrystalFree™ Oscillators
PRELIMINARY DATA SHEET
Features
Frequency Range:
Output Type:
Initial Frequency Tolerance:
Supply Voltage:
Power Consumption:
Standby Current:
Standard Package:
Operating Temperature:
4 to 133 MHz
CMOS
± 50 ppm
1.8 to 3.3 V
1.9 mA (1.8 V)
< 1 uA
5.0 x 3.2 x 0.85 mm
2.5 x 2.0 x 0.55 mm
0 to 70 °C, -20 to 70 °C
0 to 85 °C
This product is rated “Green”, please contact
factory for environmental compliancy information
Specification
Parameter
Supply Voltage
Output Frequency
Initial Frequency Tolerance
Supply Current
Quiescent Current
Input LOW level
Input HIGH level
Output LOW level
Output HIGH level
Tolerance over Temperature
Rise/Fall Time
Symmetry
Start-up time
Period Jitter RMS
Cycle to Cycle Jitter (Pk-Pk)
Symbol
VDD 1.8 V ± 5%
F
OUT
F
ITOL
IDD
1.9 mA
I
STBY
V
IL
V
IH
V
OL
V
OH
F
TEM
T
R
/T
F
1.6 ns
SYM
T
ST
PJ
RMS
CCJ
MAX
Specifications
2.5 V ± 10% 3.3 V ± 10%
4 to 133 MHz
± 50 ppm
2.0 mA
2.2 mA
1 uA
0.3 VDD (max)
0.7 VDD (min)
0.1 VDD (max)
0.9 VDD (min)
± 100 ppm
1.2 ns
1.0 ns
45% / 55%
40% / 60%
400 us
6 ps
5 ps
50 ps
40 ps
Conditions
Nominal ± tolerance
See ordering code
25°C
No load condition; 75 MHz
STBY# = GND
At STBY# pin
I
OL
= - 1 mA
I
OH
= 1 mA
Over specified operating temperatures
20% to 80% x VDD; Output load (C
L
) = 4 pF
For frequencies ≤ 100MHz;
For frequencies > 100MHz;
Output valid time after VDD meets the specified range & STBY# transition
Output load (C
L
) = 4 pF; 75 MHz; measured over 10K cycles
Output load (C
L
) = 4 pF; 75 MHz; measured over 1K cycles
17 ps
120 ps
Note: Above specifications are typical at room temperature (25°C ) unless otherwise specified.
* Over specified operating temperature range, supply variation, load variation, 3 times solder reflow, shock, vibration and 10 years aging at 25°C.
Package Outline and Dimensions
3.20 ±0.1
1.00 ±0.05
0.85
1.20 ±0.05
Pin #1 ID
Chamfer
0.5 x 45°
0.85 ±0.05
0.0-0.05
Typical PCB Land Pattern
2.2
5.0 x 3.2
(mm)
STBY#
VDD
2.5
4L SMD
5.0 x 3.2mm
5.00 ±0.1
2.54 bsc
1.6
1.6
1.6
GND
0.15
0.20 Ref.
OUT
Top View
Bottom View
Side View
1.4
0.65 ±0.05
2.0 ±0.05
0.72 ±0.05
Pin #1 ID
Chamfer
0.35 x 45°
0.0-0.05
0.55 ±0.05
1.5
2.5 x 2.0
(mm)
4L SMD
2.5 x 2.0mm
2.5 ±0.05
1.35 Bsc
1.62 Bsc
0.20 REF
STBY#
1.8
1.8
VDD
GND
0.5
OUT
0.8
0.9
Top View
Bottom View
Side View
Mar 26, 2012
www.IDT.com
©2012 Integrated Device Technology, Inc
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