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LTC2217IUP#TRPBF

Description
Analog-to-Digital Converter - ADC 16-bit, 105Msps Low Noise ADC
CategoryAnalog mixed-signal IC    converter   
File Size1MB,32 Pages
ManufacturerADI
Websitehttps://www.analog.com
Environmental Compliance
Download Datasheet Parametric Compare View All

LTC2217IUP#TRPBF Overview

Analog-to-Digital Converter - ADC 16-bit, 105Msps Low Noise ADC

LTC2217IUP#TRPBF Parametric

Parameter NameAttribute value
Brand NameAnalog Devices Inc
Is it lead-free?Contains lead
Is it Rohs certified?conform to
package instructionHVQCCN,
Contacts64
Manufacturer packaging code05-08-1705
Reach Compliance Codecompliant
Is SamacsysN
Maximum analog input voltage2.75 V
Minimum analog input voltage
Converter typeADC, PROPRIETARY METHOD
JESD-30 codeS-PQCC-N64
JESD-609 codee3
length9 mm
Maximum linear error (EL)0.0053%
Humidity sensitivity level1
Number of analog input channels1
Number of digits16
Number of functions1
Number of terminals64
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output bit codeOFFSET BINARY, 2'S COMPLEMENT BINARY
Output formatPARALLEL, WORD
Package body materialPLASTIC/EPOXY
encapsulated codeHVQCCN
Package shapeSQUARE
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Sampling rate105 MHz
Sample and hold/Track and holdSAMPLE
Maximum seat height0.8 mm
Nominal supply voltage3.3 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width9 mm
Base Number Matches1
LTC2217
16-Bit, 105Msps
Low Noise ADC
FEATURES
DESCRIPTION
The LTC
®
2217 is a 105Msps sampling 16-bit A/D converter
designed for digitizing high frequency, wide dynamic range
signals with input frequencies up to 400MHz. The input
range of the ADC is fixed at 2.75V
P-P
.
The LTC2217 is perfect for demanding communications
applications, with AC performance that includes 81.3dBFS
Noise Floor and 100dB spurious free dynamic range
(SFDR). Ultra low jitter of 85fs
RMS
allows undersampling
of high input frequencies while maintaining excellent noise
performance. Maximum DC specifications include ±3.5LSB
INL, ±1LSB DNL (no missing codes).
The digital output can be either differential LVDS or
single-ended CMOS. There are two format options for the
CMOS outputs: a single bus running at the full data rate or
demultiplexed buses running at half data rate. A separate
output power supply allows the CMOS output swing to
range from 0.5V to 3.6V.
The ENC
+
and ENC
inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL or
CMOS inputs. An optional clock duty cycle stabilizer al-
lows high performance at full speed with a wide range of
clock duty cycles.
Sample Rate: 105Msps
81.3dBFS Noise Floor
100dB SFDR
SFDR >90dB at 70MHz
85fs
RMS
Jitter
2.75V
P-P
Input Range
400MHz Full Power Bandwidth S/H
Optional Internal Dither
Optional Data Output Randomizer
LVDS or CMOS Outputs
Single 3.3V Supply
Power Dissipation: 1.19W
Clock Duty Cycle Stabilizer
Pin Compatible with LTC2208
64-Pin (9mm
×
9mm) QFN Package
APPLICATIONS
Telecommunications
Receivers
Cellular Base Stations
Spectrum Analysis
Imaging Systems
ATE
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Patents Pending.
TYPICAL APPLICATION
3.3V
SENSE
V
CM
2.2μF
1.575V
COMMON MODE
BIAS VOLTAGE
INTERNAL ADC
REFERENCE
GENERATOR
OV
DD
0.5V TO 3.6V
1μF
OF
CLKOUT
D15
D0
OGND
CLOCK/DUTY
CYCLE
CONTROL
V
DD
GND
ENC
+
ENC
SHDN
DITH
MODE
LVDS
RAND
1μF
1μF
3.3V
1μF
2217 TA01
64k Point FFT,
F
IN
= 4.9MHz, –1dBFS
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
0
10
20
40
30
FREQUENCY (MHz)
50
2217 TA01b
ANALOG
INPUT
AIN
S/H
AMP
16-BIT
PIPELINED
ADC CORE
CORRECTION
LOGIC AND
SHIFT REGISTER
OUTPUT
DRIVERS
CMOS
OR
LVDS
ADC CONTROL INPUTS
AMPLITUDE (dBFS)
AIN
+
+
2217f
1

LTC2217IUP#TRPBF Related Products

LTC2217IUP#TRPBF LTC2217CUP#PBF
Description Analog-to-Digital Converter - ADC 16-bit, 105Msps Low Noise ADC Analog to Digital Converters - ADC 16-bit, 105Msps Low Noise ADC
Brand Name Analog Devices Inc Analog Devices Inc
Is it lead-free? Contains lead Contains lead
Is it Rohs certified? conform to conform to
package instruction HVQCCN, HVQCCN,
Contacts 64 64
Manufacturer packaging code 05-08-1705 05-08-1705
Reach Compliance Code compliant compliant
Maximum analog input voltage 2.75 V 2.75 V
Converter type ADC, PROPRIETARY METHOD ADC, PROPRIETARY METHOD
JESD-30 code S-PQCC-N64 S-PQCC-N64
JESD-609 code e3 e3
length 9 mm 9 mm
Maximum linear error (EL) 0.0053% 0.0053%
Humidity sensitivity level 1 1
Number of analog input channels 1 1
Number of digits 16 16
Number of functions 1 1
Number of terminals 64 64
Maximum operating temperature 85 °C 70 °C
Output bit code OFFSET BINARY, 2'S COMPLEMENT BINARY OFFSET BINARY, 2'S COMPLEMENT BINARY
Output format PARALLEL, WORD PARALLEL, WORD
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code HVQCCN HVQCCN
Package shape SQUARE SQUARE
Package form CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius) 260 260
Certification status Not Qualified Not Qualified
Sampling rate 105 MHz 105 MHz
Sample and hold/Track and hold SAMPLE SAMPLE
Maximum seat height 0.8 mm 0.8 mm
Nominal supply voltage 3.3 V 3.3 V
surface mount YES YES
Temperature level INDUSTRIAL COMMERCIAL
Terminal surface Matte Tin (Sn) Matte Tin (Sn)
Terminal form NO LEAD NO LEAD
Terminal pitch 0.5 mm 0.5 mm
Terminal location QUAD QUAD
Maximum time at peak reflow temperature 30 30
width 9 mm 9 mm
Base Number Matches 1 1

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