PIC24FJ256DA210 Family
Data Sheet
64/100-Pin,
16-Bit Flash Microcontrollers
with Graphics Controller and
USB On-The-Go (OTG)
2010 Microchip Technology Inc.
DS39969B
Note the following details of the code protection feature on Microchip devices:
•
•
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
•
•
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
K
EE
L
OQ
, K
EE
L
OQ
logo, MPLAB, PIC, PICmicro, PICSTART,
PIC
32
logo, rfPIC and UNI/O are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified
logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance,
TSHARC, UniWinDriver, WiperLock and ZENA are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2010, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-60932-235-9
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC
®
MCUs and dsPIC
®
DSCs, K
EE
L
OQ
®
code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS39969B-page 2
2010 Microchip Technology Inc.
PIC24FJ256DA210 FAMILY
64/100-Pin, 16-Bit Flash Microcontrollers
with Graphics Controller and USB On-The-Go (OTG)
Graphics Controller Features:
• Three Graphics Hardware Accelerators to Facilitate
Rendering of Block Copying, Text and Unpacking of
Compressed Data
• Color Look-up Table (CLUT) with Maximum of 256 Entries
• 1/2/4/8/16 bits-per-pixel (bpp) Color Depth Set at
Run Time
• Display Resolution Programmable According to
Frame Buffer:
- Supports direct access to external memory on
devices with EPM
P
Peripheral Features:
• Enhanced Parallel Master Port/Parallel Slave Port
(EPMP/PSP), 100-pin devices only:
- Direct access from CPU with an Extended Data
Space (EDS) interface
- 4, 8 and 16-bit wide data bus
- Up to 23 programmable address lines
- Up to 2 chip select lines
- Up to 2 Acknowledgement lines (one per chip
select)
- Programmable address/data multiplexing
- Programmable address and data Wait states
- Programmable polarity on control signals
• Peripheral Pin Select:
- Up to 44 available pins (100-pin devices)
• Three 3-Wire/4-Wire SPI modules (supports 4 Frame
modes)
• Three I
2
C™ modules Supporting Multi-Master/Slave
modes and 7-Bit/10-Bit Addressing
• Four UART modules:
- Supports RS-485, RS-232, LIN/J2602 protocols
and IrDA
®
• Five 16-Bit Timers/Counters with Programmable
Prescaler
• Nine 16-Bit Capture Inputs, each with a Dedicated Time
Base
• Nine 16-Bit Compare/PWM Outputs, each with a Dedi-
cated Time Base
• Hardware Real-Time Clock and Calendar (RTCC)
• Enhanced Programmable Cyclic Redundancy Check
(CRC) Generator
• Up to 5 External Interrupt Sources
- Resolution supported is up to 480x272 @ 60 Hz,
16 bpp; 640x480 @ 30 Hz, 16 bpp or
640x480 @ 60 Hz, 8 bpp
• Supports Various Display Interfaces:
- 4/8/16-bit Monochrome STN
- 4/8/16-bit Color STN
- 9/12/18/24-bit Color TFT (18 and 24-bit displays
are connected as 16-bit, 5-6-5 RGB color format)
Universal Serial Bus Features:
• USB v2.0 On-The-Go (OTG) Compliant
• Dual Role Capable – Can act as either Host or Peripheral
• Low-Speed (1.5 Mbps) and Full-Speed (12 Mbps)
USB Operation in Host mode
• Full-Speed USB Operation in Device mode
• High-Precision PLL for USB
• Supports up to 32 Endpoints (16 bidirectional):
- USB module can use the internal RAM location
from 0x800 to 0xFFFF as USB endpoint buffers
• On-Chip USB Transceiver with Interface for Off-Chip
Transceiver
• Supports Control, Interrupt, Isochronous and Bulk
Transfers
• On-Chip Pull-up and Pull-Down Resistors
Program Memory
(bytes)
Graphics Controller
Y
Y
Y
Y
Y
Y
Y
Y
Remappable Peripherals
10-Bit A/D (ch)
SRAM (bytes)
Comparators
UART w/IrDA
®
EPMP/PSP
16-Bit Timers
Remappable
Pins
IC/OC PWM
PIC24FJ128DA106
PIC24FJ256DA106
PIC24FJ128DA110
PIC24FJ256DA110
PIC24FJ128DA206
PIC24FJ256DA206
PIC24FJ128DA210
PIC24FJ256DA210
64
64
100/121
100/121
64
64
100/121
100/121
128K
256K
128K
256K
128K
256K
128K
256K
24K
24K
24K
24K
96K
96K
96K
96K
29
29
44
44
29
29
44
44
5
5
5
5
5
5
5
5
9/9
9/9
9/9
9/9
9/9
9/9
9/9
9/9
4
4
4
4
4
4
4
4
SPI
PIC24FJ Device
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
16
16
24
24
16
16
24
24
3
3
3
3
3
3
3
3
Y
Y
Y
Y
Y
Y
Y
Y
N
N
Y
Y
N
N
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
2010 Microchip Technology Inc.
DS39969B-page 3
USB OTG
Y
Y
Y
Y
Y
Y
Y
Y
CTMU
RTCC
I
2
C™
Pins
PIC24FJ256DA210 FAMILY
High-Performance CPU
Modified Harvard Architecture
Up to 16 MIPS Operation at 32 MHz
8 MHz Internal Oscillator
17-Bit x 17-Bit Single-Cycle Hardware Multiplier
32-Bit by 16-Bit Hardware Divider
16 x 16-Bit Working Register Array
C Compiler Optimized Instruction Set Architecture
with Flexible Addressing modes
• Linear Program Memory Addressing, up to
12 Mbytes
• Data Memory Addressing, up to 16 Mbytes:
- 2K SFR space
- 30K linear data memory
- 66K extended data memory
- Remaining (from 16 Mbytes) memory (external)
can be accessed using extended data Memory
(
EDS) and EPMP (EDS is divided into 32-Kbyte
pages)
• Two Address Generation Units for Separate Read
and Write Addressing of Data Memory
•
•
•
•
•
•
•
Analog Features:
• 10-Bit, up to 24-Channel Analog-to-Digital (A/D)
Converter at 500 ksps:
- Operation is possible in Sleep mode
- Band gap reference input feature
• Three Analog Comparators with Programmable
Input/Output Configuration
• Charge Time Measurement Unit (CTMU):
- Supports capacitive touch sensing for touch
screens and capacitive switches
- Minimum time measurement setting at 100 ps
• Available LVD Interrupt V
LVD
Level
Special Microcontroller Features:
• Operating Voltage Range of 2.2V to 3.6V
• 5.5V Tolerant Input (digital pins only)
• Configurable Open-Drain Outputs on Digital I/O
Ports
• High-Current Sink/Source (18 mA/18 mA) on all
I/O Ports
• Selectable Power Management modes:
- Sleep, Idle and Doze modes with fast wake-up
• Fail-Safe Clock Monitor (FSCM) Operation:
- Detects clock failure and switches to on-chip,
FRC oscillator
• On-Chip LDO Regulator
• Power-on Reset (POR) and
Oscillator Start-up Timer (OST)
• Brown-out Reset (BOR)
• Flexible Watchdog Timer (WDT) with On-Chip
Low-Power RC Oscillator for Reliable Operation
• In-Circuit Serial Programming™ (ICSP™) and
In-Circuit Debug (ICD) via 2 Pins
• JTAG Boundary Scan Support
• Flash Program Memory:
- 10,000 erase/write cycle endurance (minimum)
- 20-year data retention minimum
- Selectable write protection boundary
- Self-reprogrammable under software control
- Write protection option for Configuration Words
Power Management:
• On-Chip Voltage Regulator of 1.8V
• Switch between Clock Sources in Real Time
• Idle, Sleep and Doze modes with Fast Wake-up and
Two-Speed Start-up
• Run Mode: 800
A/MIPS,
3.3V Typical
• Sleep mode Current Down to 20
A,
3.3V Typical
• Standby Current with 32 kHz Oscillator: 22
A,
3.3V Typical
DS39969B-page 4
2010 Microchip Technology Inc.
PIC24FJ256DA210 FAMILY
Pin Diagram (64-Pin TQFP/QFN)
HSYNC/CN62/RE4
GD3/CN61/RE3
GD2/CN60/RE2
GD1/CN59/RE1
GD0/CN58/RE0
GD11/V
CMPST
2/SESSVLD/CN69/RF1
GD10/V
BUSST
/V
CMPST
1/V
BUSVLD
/CN68/RF0
ENVREG
V
CAP
C3INA/SESSEND/CN16/RD7
C3INB/CN15/RD6
RP20/GPWR/CN14/RD5
RP25/GCLK/CN13/RD4
RP22/GEN/CN52/RD3
DPH/RP23/CN51/RD2
V
CPCON
/RP24/GD9/V
BUSCHG
/CN50/RD1
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
V
SYNC
/CN63/RE5
GD12/SCL3/CN64/RE6
GD13/SDA3/CN65/RE7
C1IND/RP21/CN8/RG6
C1INC/RP26/CN9/RG7
C2IND/RP19/GD14/CN10/RG8
MCLR
C2INC/RP27/GD15/CN11/RG9
V
SS
(1)
V
DD
PGEC3/AN5/C1INA/V
BUSON
/RP18/CN7/RB5
PGED3/AN4/C1INB/USBOEN/RP28/CN6/RB4
AN3/C2INA/VPIO/CN5/RB3
AN2/C2INB/VMIO/RP13/CN4/RB2
PGEC1/AN1/V
REF
-/RP1/CN3/RB1
PGED1/AN0/V
REF
+/RP0/CN2/RB0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
SOSCO/SCLKI/T1CK/C3INC/RPI37/CN0/
RC14
SOSCI/C3IND/CN1/RC13
DMH/RP11/INT0/CN49/RD0
RP12/GD7/CN56/RD11
SCL1/RP3/GD6/CN55/RD10
DPLN/SDA1/RP4/GD8/CN54/RD9
RTCC/DMLN/RP2/CN53/RD8
V
SS
(1)
OSCO/CLKO/CN22/RC15
OSCI/CLKI/CN23/RC12
V
DD
D+/CN83/RG2
D-/CN84/RG3
V
USB
V
BUS
/RF7
RP16/USBID/CN71/RF3
PIC24FJXXXDAX06
Note 1:
Legend:
The back pad on QFN devices should be connected to V
SS
.
RPn
and
RPIn
represents remappable peripheral pins.
Shaded pins indicate pins that are tolerant to up to +5.5V.
2010 Microchip Technology Inc.
PGEC2/AN6/RP6/CN24/RB6
PGED2/AN7/RP7/RCV/CN25/RB7
AV
DD
AV
SS
AN8/RP8/CN26/RB8
AN9/RP9/CN27/RB9
TMS/CV
REF
/AN10/CN28/RB10
TDO/AN11/CN29/RB11
V
SS
(1)
V
DD
TCK/AN12/CTEDG2/CN30/RB12
TDI/AN13CTEDG1/CN31/RB13
AN14/CTPLS/RP14/CN32/RB14
AN15/RP29/REFO/CN12/RB15
SDA2/RP10/GD4/CN17/GD4/RF4
SCL2/RP17/GD5/CN18/RF5
DS39969B-page 5
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