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MCP4641T-503E/ML

Description
Digital Potentiometer IC Dual 7B NV I2C POT
CategoryAnalog mixed-signal IC    converter   
File Size2MB,103 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Environmental Compliance
Download Datasheet Download user manual Parametric View All

MCP4641T-503E/ML Overview

Digital Potentiometer IC Dual 7B NV I2C POT

MCP4641T-503E/ML Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeQFN
package instructionHVQCCN, LCC16,.16SQ,25
Contacts16
Reach Compliance Codecompliant
ECCN codeEAR99
Other featuresNON-VOLATILE MEMORY
Nominal bandwidth0.2 kHz
control interfaceINCREMENT/DECREMENT
Converter typeDIGITAL POTENTIOMETER
JESD-30 codeS-PQCC-N16
JESD-609 codee3
length4 mm
Humidity sensitivity level1
Number of functions2
Number of positions129
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeHVQCCN
Encapsulate equivalent codeLCC16,.16SQ,25
Package shapeSQUARE
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
power supply3/5 V
Certification statusNot Qualified
resistance lawLINEAR
Maximum resistor terminal voltage5.5 V
Minimum resistor terminal voltage
Maximum seat height1 mm
Nominal supply voltage2.7 V
surface mountYES
technologyCMOS
Nominal temperature coefficient150 ppm/°C
Temperature levelAUTOMOTIVE
Terminal surfaceMatte Tin (Sn)
Terminal formNO LEAD
Terminal pitch0.65 mm
Terminal locationQUAD
Maximum time at peak reflow temperature40
Nominal total resistance50000 Ω
width4 mm
Base Number Matches1
MCP454X/456X/464X/466X
7/8-Bit Single/Dual I
2
C Digital POT with
Nonvolatile Memory
Features
• Single or Dual Resistor Network Options
• Potentiometer or Rheostat Configuration Options
• Resistor Network Resolution
- 7-bit: 128 Resistors (129 Steps)
- 8-bit: 256 Resistors (257 Steps)
• R
AB
Resistances Options of:
- 5 k
- 10 k
- 50 k
- 100 k
• Zero-Scale to Full-Scale Wiper Operation
• Low Wiper Resistance: 75 (typical)
• Low Tempco:
- Absolute (Rheostat): 50 ppm typical
(0°C to 70°C)
- Ratiometric (Potentiometer): 15 ppm typical
• Nonvolatile Memory
- Automatic Recall of Saved Wiper Setting
- WiperLock™ Technology
- 10 General Purpose Memory Locations
• I
2
C Serial Interface
- 100 kHz, 400 kHz and 3.4 MHz Support
• Serial Protocol Allows:
- High-Speed Read/Write to Wiper
- Read/Write to EEPROM
- Write Protect to be Enabled/Disabled
- WiperLock to be Enabled/Disabled
• Resistor Network Terminal Disconnect Feature
via the Terminal Control (TCON) Register
• Write Protect Feature:
- Hardware Write Protect (WP) Control Pin
- Software Write Protect (WP) Configuration Bit
• Brown-out Reset Protection (1.5V typical)
• Serial Interface Inactive Current (2.5 uA typical)
• High-Voltage Tolerant Digital Inputs: Up to 12.5V
• Wide Operating Voltage:
- 2.7V to 5.5V - Device Characteristics Specified
- 1.8V to 5.5V - Device Operation
• Wide Bandwidth (-3dB) Operation:
- 2 MHz (typ.) for 5.0 k Device
• Extended Temperature Range (-40°C to +125°C)
Description
The MCP45XX and MCP46XX devices offer a wide
range of product offerings using an I
2
C interface. This
family of devices support 7-bit and 8-bit resistor
networks, nonvolatile memory configurations, and
Potentiometer and Rheostat pinouts.
WiperLock Technology allows application-specific
calibration settings to be secured in the EEPROM.
Package Types (top view)
MCP45X1
Single Potentiometer
HVC / A0
SCL
SDA
V
SS
1
2
3
4
8
7
6
5
V
DD
P0B
P0W
P0A
MCP45X2
Single Rheostat
HVC / A0
SCL
SDA
V
SS
1
2
3
4
8
7
6
5
V
DD
A1
P0B
P0W
MSOP
HVC / A0 1
SCL 2
SDA 3
V
SS
4
EP
9
8 V
DD
7 P0B
6 P0W
5 P0A
HVC / A0 1
SCL 2
SDA 3
V
SS
4
MSOP
8 V
DD
EP
9
7 A1
6 P0B
5 P0W
DFN 3x3 (MF) *
DFN 3x3 (MF) *
MCP46X1
Dual Potentiometers
HVC/A0
SCL
SDA
V
SS
P1B
P1W
P1A
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
A1
A2
WP
P0B
P0W
P0A
HVC/A0
V
DD
A1
A2
16 15 14 13
SCL
SDA
V
SS
V
SS
1
2
3
4
EP
17
5 6 7 8
P1B
P1W
P1A
P0A
12 WP
11 NC
10 P0B
9 P0W
TSSOP
QFN-16 4x4 (ML) *
MCP46X2
Dual Rheostat
HVC/A0
SCL
SDA
V
SS
P1B
1
2
3
4
5
10 V
DD
HVC / A0 1
9 A1
SCL 2
8 P0B
SDA 3
7 P0W
V
SS
4
6 P1W
P1B 5
10 V
DD
EP
11
9 A1
8 P0B
7 P0W
6 P1W
MSOP
DFN 3x3 (MF) *
* Includes Exposed Thermal Pad (EP); see
Table 3-1.
2008-2013 Microchip Technology Inc.
DS22107B-page 1

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