Preliminary Datasheet
LX7720
Radiation Tolerant Power Driver with
Rotation and Position Sensing
Description
The LX7720 provides four half-bridge drivers with floating
current sense for motor coil driving, six bi-level inputs for
sensing rotary encoders, and a resolver to digital interface
with primary coil driver. When used with an FPGA, the
LX7720 provides a complete closed loop motor driver with
coil current feedback and rotation or linear position
sensing. With flexible FPGA programming, the combined
system can provide motor control for Stepper motors,
Brushless DC and Permanent Magnet motors. Position
sensing supports encoders, Hall sensors, resolvers,
synchros, and LVDTs. FPGA IP modules are available to
support motor driving functions from open loop cardinal
step driving to space vector modulation using field oriented
control.
The LX7720 contains 7 sigma delta modulators for analog
sampling; the sinc3 filters and decimation is performed in
the FPGA with available IP module. Four of the modulators
sample the voltage across floating current sense inputs
and three modulators sample differential analog inputs
such as the outputs of a resolver transformer. Speed
versus accuracy tradeoffs can be exploited.
The LX7720 supports a ground potential difference
between the motor and signal grounds of up to 10V and
motor supply voltages up to 200V. Resolver carrier
frequencies from 360Hz to 20kHz are supported. The
LX7720 offers 1kV HBM ESD pin protection on all sensor
and bi-level pins. It is packaged in a 132-pin ceramic quad
flat pack and operates over a -55°C to 125°C temperature
range. It is radiation tolerant to 100krad TID and 50krad
ELDRs as well as single event latch up immune up to
87.85MeV·cm
2
/mg and 125°C (fluence of 1e8
particle/cm
2
).
Features
▪
▪
▪
▪
▪
▪
▪
Four half-bridge Nch MOSFET drivers
Four floating differential current sensors
Pulse modulated resolver transformer driver
Three differential resolver sense inputs
Six bi-level logic inputs
Fault detection
Radiation Tolerant: 100krad TID, 50krad
ELDRS, Single Event
Applications
▪
Motor driver servo control
▪
Linear actuator servo control
▪
Stepper, BLDC, PMSM motor driver
Figure 1 ·
Product Highlight
June 2018
© 2018 Microsemi Corporation
LX7720 rev 0.5
1
1
Radiation Tolerant Power Driver with Rotation and Position Feedback
Pin Configuration and Pinout
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
Ordering Information
Junction
Temperature
-55°C to 125°C
-55°C to 125°C
Commercial
Type
MIL-PRF-38535 Class V
MIL-PRF-38535 Class Q
Engineering Samples
Package
CQFP 132L
CQFP 132L
CQFP 132L
Part Number
LX7720MFQ-EV
LX7720MFQ-EQ
LX7720-ES
Packaging Type
Bulk / Tray
Bulk / Tray
Bulk
June 2018
© 2018 Microsemi Corporation
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
VCC
SGND
ADC3_N
ADC3_P
ADC2_N
ADC2_P
ADC1_N
ADC1_P
SGND
MGND
DMOD_OUT_N
DMOD_PS
DMOD_OUT_P
MGND
VGS_VEE
VEE_CP_P
VEE_CP_N
VEE
MGND_VEE
SPARE
MGND
VGSA
LD_A
NU
SW_A
UD_A
VFLT_A
NU
CSPS_A
RTN_A
CS_A
NU
MGND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
BLO4
BLO3
BLO2
BLO1
SGND
BLI6
BLI5
BLI4
BLI3
BLI2
BLI1
VPROG
VCC
BL_TH
M2V
SCP
TESTMODE1
SGND
DMOD_BW
TESTMODE2
MGND
VGSD
LD_D
NU
SW_D
UD_D
VFLT_D
NU
CSPS_D
RTN_D
CS_D
NU
MGND
BLO5
BLO6
UD_IN_A
LD_IN_A
UD_IN_B
LD_IN_B
UD_IN_C
LD_IN_C
UD_IN_D
LD_IN_D
DMOD_IN_P
DMOD_IN_N
CP_CLK
PR_FAULT
OC_FAULT
OTW_FAULT
SM_EN
RESET
VREF_OUT
VREF_IN
VCC
SGND
VDD
SNS_OUT_A
SNS_OUT_B
SNS_OUT_C
SNS_OUT_D
ADC1
ADC2
ADC3
MOD_CLK
SGND
CLK_OUT
VGSC
LD_C
NU
SW_C
UD_C
VFLT_C
NU
CSPS_C
RTN_C
CS_C
NU
MGND
/EXT_VEE_EN
MGND
VGS
CPN
NU
VBOOST
CPP
VMPS
NU
MGND
NU
CS_B
RTN_B
CSPS_B
NU
VFLT_B
UD_B
SW_B
NU
LD_B
VGSB
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
Figure 2 ·
Pinout
LX7720 rev 0.5
2
Pin Description
Pin Description
Pin Number
Pin Designator
Description
Fixed Threshold Bi Level detector output – logic output
1-2
BLO5 to 6
– Provides the state of the Fixed Level Bi Level Input
of the same #. BLO5,6= pins 1,2.
Phase # upper MOSFET driver control input – logic
input – This logic input when asserted causes the
3,5,7,9
UD_IN_#
upper N-ch MOSFET of the phase # half bridge to turn
on. De-assertion causes the MOSFET to turn off.
Phase A,B,C,D = pins 3,5,7,9.
Phase # lower MOSFET driver control input – logic
input – This logic input when asserted causes the
4,6, 8,10
LD_IN_#
lower N-ch MOSFET of the phase # half bridge to turn
on. De-assertion causes the MOSFET to turn off.
Phase A,B,C,D = pins 4,6,8,10.
Pulse width modulated reference – logic input –
Provides a pulse coded reference signal that when
11-12
DMOD_IN_#
amplified and filtered produces the exciter drive signal
to the resolver or LVDT transformer primary. The
DMOD_IN_P (pin 11) drives DMOD_OUT_P. The
DMOD_IN_N (pin 12) drives DMOD_OUT_N..
Charge pump clock input – logic input – Provides the
13
CP_CLK
timing for the charge pumps that power the floating
high side drivers and DMOD timer.
Power Rail Fault Detected – logic output – When
14
PR_FAULT
asserted this pin indicates that one of the power rails is
below its under voltage threshold or the VGS supply or
DMOD_PS supply is overloaded.
Over Current Fault Detected – logic output – When
15
OC_FAULT
asserted this pin indicates an overcurrent fault
condition exists as detected at one of the current
sensors.
Over Temperature Warning Fault Detected – logic
16
OTW_FAULT
output – When asserted this pin indicates the die
temperature is has exceeded the over temperature
warning threshold.
Enable Safe Mode – logic input – If this pin set
17
SM_EN
high(tied to VDD), the LX7720 will detect faults and
enable protection countermeasures. If this pin is
shorted to SGND, faults will be reported but protection
June 2018
© 2018 Microsemi Corporation
LX7720 rev 0.5
3
Radiation Tolerant Power Driver with Rotation and Position Feedback
Pin Number
Pin Designator
Description
countermeasures will not be taken. This pin has a
weak pull up to VDD.
Reset Fault Latch – logic input – If SM_EN is not low,
18
RESET
and RESET is asserted, the latched fault condition is
reset allowing the LX7720 to attempt to begin
functioning normally.
2.5V reference out– signal output – This pin is a
19
VREF_OUT
precision reference voltage generated internally. A
minimum 200nF bypass capacitor to SGND is
required.
2.5V reference in – signal input – This pin provides the
reference voltage for the ADC sigma delta modulators.
20
VREF_IN
An external reference can be connected here or
alternatively the VREF_OUT can be connected to this
pin.
Main power supply – power input – This pin is the main
21, 34, 120
VCC
power supply for the portion of the LX7720 that is
referenced to SGND. A bypass capacitor to SGND is
required.
Signal Ground – power pin – This pin provides the
22,32,35,42,115,128
SGND
ground reference for ADC input signals, bi-level logic
and FPGA communication. This ground can be a
different potential from the motor ground (MGND).
VDD - power input – This pin is used to reference the
23
VDD
I/O logic levels to be compatible with the FPGA. It
connects to the FPGA I/O power supply.
Phase # current sense output – logic output – This pin
provides the output of a 2
nd
order sigma delta
modulator where the output pulse train represents the
magnitude and polarity of the differential voltage
potential between the CS# and RTN# pins. Phase
A,B,C,D = pins 24,25,26,27.
A to D Converter # output – logic output – This pin
provides the output of a 2
nd
order sigma delta
modulator where the output pulse train represents the
magnitude and polarity of the differential voltage
potential between the ADC#_P and ADC#_N pins.
ADC1,2,3 = pins 28,29,30.
24-27
SNS_OUT_#
28-30
ADC#
June 2018
© 2018 Microsemi Corporation
LX7720 rev 0.5
4
Pin Description
Pin Number
Pin Designator
Description
Modulator clock input – logic input – Provides the
31
MOD_CLK
clock for the sample rate of the sigma delta
modulators.
33
CLK_OUT
Modulator clock output – logic output – Provides the
modulator sample clock.
ADC modulator differential input – differential signal
input - These pins provide a differential analog signal
feeding into the ADC# sigma delta modulator. For
maximum range this input should be referenced to
VREF_IN. ADC1,2,3_N = pins 40,38,36. ADC1,2,3_P
= pins 41,39,37.
Motor ground – power pin – This pin is the return rail
36,41
ADC#_N or P
43,47,52,54,66,
78,86,88,100,112
MGND
for the lower motor drivers and connects to the return
rail of the motor power supply. This ground may be a
different potential than SGND.
Pulse modulated reference out – differential signal
output – These pins provide a diffferential pulse coded
signal used to drive the primary of a resolver
44,46
DMOD_OUT_#
transformer. The pin voltage amplitude swings from
MGND to DMOD_PS. The DMOD_OUT_P (pin 46) is
driven by DMOD_IN_P and the DMOD_OUT_N (pin
44) is driven by DMOD_IN_N.
Demodulator driver power supply input – power input
– This pin provides the power to the DMOD_OUT_#
45
DMOD_PS
differential driver outputs. This pin can be connected to
the VGS pin or alternatively to an external power
regulator. A bypass capacitor to MGND is required.
MOSFET driver power – power input – This pin
provides power to the MOSFET drivers and should not
exceed the maximum VGS of the external MOSFET
switches. A bypass capacitor to MGND is required. All
VGS# inputs would typically connect to a common
voltage source.
VEE charge pump transfer capacitor – power pin – A
capacitor is connected between the VEE_CP_P and
48,55,67,85,99,111
VGS#
49, 50
VEE_CP_P or N
VEE_CP_N pins. The capacitor forms a charge pump
used to generate a negative (inverted) voltage from the
VGS supply pin.
51
VEE
Negative power rail – power pin – This pin is the
negative voltage power rail. It can be generated
June 2018
© 2018 Microsemi Corporation
LX7720 rev 0.5
5
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