EEWORLDEEWORLDEEWORLD

Part Number

Search

9FGV1001BQ500LTGI8

Description
Clock generators and supporting products
Categorysemiconductor    The clock and timer IC    The clock generator and supporting products   
File Size295KB,16 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
Download Datasheet Parametric Compare View All

9FGV1001BQ500LTGI8 Online Shopping

Suppliers Part Number Price MOQ In stock  
9FGV1001BQ500LTGI8 - - View Buy Now

9FGV1001BQ500LTGI8 Overview

Clock generators and supporting products

9FGV1001BQ500LTGI8 Parametric

Parameter NameAttribute value
MakerIDT (Integrated Device Technology, Inc.)
Product CategoryClock generators and supporting products
series9FGV1001
typeProgrammable Clock Generators
Maximum input frequency240 MHz
Maximum output frequency325 MHz
Number of outputs4 Output
Duty Cycle - Max60 %
Working power voltage1.71 V to 3.465 V
Working power current23 mA
Minimum operating temperature- 40 C
Maximum operating temperature+ 85 C
Installation styleSMD/SMT
Package/boxVFQFPN-24
EncapsulationReel
Output typeLP-HCSL, LVDS
productClocks
beat28 ps
Factory packaging quantity2500
Supply voltage - max.3.465 V
Supply voltage - min.1.71 V
Low Phase-Noise, Low-Power
Programmable PhiClock™ Generator
9FGV1001
Datasheet
Description
The 9FGV1001 is a member of IDT's PhiClock™ programmable
clock generator family. The 9FGV1001 provides four non-spread
spectrum copies of a single output frequency and two copies of
the crystal reference input. Two select pins allow for hardware
selection of the desired configuration, or two I
2
C bits allow easy
software selection of the desired configuration. The user may
configure any one of the four OTP configurations as the default
when operating in I
2
C mode. Four unique I
2
C addresses are
available, allowing easy I
2
C access to multiple components.
Features
1.8V–3.3V core V
DD
and V
DDREF
Individual 1.8V–3.3V V
DDO
for each programmable output pair
Supports HCSL, LVDS and LVCMOS I/O standards
Supports LVPECL and CML logic with easy AC coupling – see
application note
AN-891
for alternate terminations
HCSL utilizes IDT's LP-HCSL technology for improved
performance, lower power and higher integration:
• Programmable output impedance of 85 or 100Ω
On-board OTP supports up to 4 complete configurations
Configuration selected via strapping pins or I
2
C
< 125mW at 1.8V, < 230mW at 3.3V with outputs running at
100MHz
4 programmable I
2
C addresses: D0/D1, D2/D3, D4/D5, D6/D7
read/write
Supported by IDT
Timing Commander™
software
4 × 4 mm 24-VFQFPN; minimal board space
Typical Applications
HPC
Storage
10G/25G Ethernet
Fiber Optic Modules
SSDs
Output Features
4 programmable output pairs plus 2 LVCMOS REF outputs
1 integer output frequency per configuration
10MHz–325MHz output frequency (LVDS or LP-HCSL output
configuration)
10MHz–200MHz output frequency (LVCMOS output
configuration)
Key Specifications
259fs rms typical phase jitter outputs at 156.25MHz (12kHz–
20MHz)
PCIe Gen1–4 compliant
PCIe Clocking Architectures
Supported
Common Clocked (CC)
Independent Reference without spread spectrum (SRnS)
Block Diagram
VDDDp
XIN/CLKIN
XO
OTP_VPP
VDDAp
REF1
REF0
VDDREFp
OUT3#
OUT3
VDDO3
OUT2#
OUT2
VDDO2
OUT1#
OUT1
VDDO1
OUT0#
OUT0
VDDO0
OSC
INT
PLL
INT
DIV
vSEL_I2C#
^SEL0/SCL
^SEL1/SDA
^OEB
^OEA
SMBus
Engine
Factory
Configuration
Control Logic
Internal terminations are available when LP -HCSL output format is selected .
EPAD/GND
©2018 Integrated Device Technology, Inc.
1
July 5, 2018

9FGV1001BQ500LTGI8 Related Products

9FGV1001BQ500LTGI8 9FGV1001A000NBGI8 9FGV1001BQ500LTGI 9FGV1001B003NBGI8
Description Clock generators and supporting products Clock generator and supporting products PCIe Ethernet Clock Clock generators and supporting products Clock Generators and Support Products 4 O/P 1INT PHI CLOCK
Maker IDT (Integrated Device Technology, Inc.) IDT (Integrated Device Technology, Inc.) IDT (Integrated Device Technology, Inc.) IDT (Integrated Device Technology, Inc.)
Product Category Clock generators and supporting products Clock generators and supporting products Clock generators and supporting products Clock generators and supporting products
series 9FGV1001 9FGV1001 9FGV1001 9FGV1001
type Programmable Clock Generators Programmable Clock Generators Programmable Clock Generators Programmable Clock Generators
Maximum input frequency 240 MHz 240 MHz 240 MHz 240 MHz
Maximum output frequency 325 MHz 325 MHz 325 MHz 325 MHz
Number of outputs 4 Output 4 Output 4 Output 4 Output
Duty Cycle - Max 60 % 60 % 60 % 60 %
Working power voltage 1.71 V to 3.465 V 1.71 V to 3.465 V 1.71 V to 3.465 V 1.71 V to 3.465 V
Working power current 23 mA 23 mA 23 mA 23 mA
Minimum operating temperature - 40 C - 40 C - 40 C - 40 C
Maximum operating temperature + 85 C + 85 C + 85 C + 85 C
Installation style SMD/SMT SMD/SMT SMD/SMT SMD/SMT
Package/box VFQFPN-24 VFQFPN-24 VFQFPN-24 VFQFPN-24
Encapsulation Reel Reel Tray Reel
Output type LP-HCSL, LVDS LP-HCSL, LVDS LP-HCSL, LVDS LP-HCSL, LVDS
product Clocks Clocks Clocks Clocks
beat 28 ps 28 ps 28 ps 28 ps
Factory packaging quantity 2500 2500 490 3000
Supply voltage - max. 3.465 V 3.465 V 3.465 V 3.465 V
Supply voltage - min. 1.71 V 1.71 V 1.71 V 1.71 V
After you memorize it, your spoken English will no longer be a problem
Absence makes the heart grow fonder. 小别胜新婚。 After you. 您先。Allow me. 让我来。Any day will do. 哪一天都行夕Any messages for me? 有我的留言吗?Any thing else? 还要别的吗?Any urgent thing? 有急事吗? Are you kidding? 你在开玩笑吧!Are you...
bhl8665 Talking
App Client
Is there an app client? I found that the logs cannot be accessed on the mobile browser. Does the platform have plans to develop an app? :)...
zhulaee Suggestions & Announcements
How to change the default UART0 position 1 to UART1 position 1 in the CC2530 protocol stack serial communication
The serial port pins of my development board are P0.4 and P0.5, while most development boards use the default P0.2 and P0.3 pins. So I can't find any information, and I have tried many methods, but al...
34572348 RF/Wirelessly
I am working on a camera project, and the image is shaking left and right, up and down, and the display is misaligned.
I use Samsung 2443 to connect to ov7670 camera. When it is displayed on LCD, it shakes left and right. After saving the picture, it is misplaced. When previewing, the still image shakes. After taking ...
sunbala003 Embedded System
Problems with saving CCS3.3 projects
[size=4]Is there a problem when saving the created project under CSS3.3? I hope you can give me some advice, thank you[/size] [size=4][img=283,194]http://bbs.elecfans.com/data/attachment/forum/201410/...
zhaironghui DSP and ARM Processors
Design of a Wideband L-Band 360-degree Analog Signal Phase Shifter
This paper introduces the design theory of broadband 360-degree analog phase shifter. The linear phase modulation, balanced insertion loss fluctuation, broadband etc. of the phase shifter are discusse...
JasonYoo Analog electronics

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 116  1808  1012  2043  1476  3  37  21  42  30 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号