Data Sheet
FEATURES
Low on resistance: 0.8 Ω maximum at 125°C
0.25 Ω maximum on resistance flatness
1.8 V to 5.5 V single supply
200 mA current carrying capability
Automotive temperature range: –40°C to +125°C
Rail-to-rail operation
6-lead SOT-23, 8-lead MSOP, and 6-ball WLCSP packages
Fast switching times
Typical power consumption (<0.01 µW)
TTL-/CMOS-compatible inputs
Pin compatible with the
ADG719
0.5 Ω, CMOS,
1.8 V to 5.5 V, 2:1 Mux/SPDT Switch
ADG819
FUNCTIONAL BLOCK DIAGRAM
ADG819
S2
D
S1
IN
SWITCHES SHOWN
FOR A LOGIC 1 INPUT
Figure 1.
APPLICATIONS
Power routing
Battery-powered systems
Communication systems
Data acquisition systems
Cellular phones
Modems
PCMCIA cards
Hard drives
Relay replacement
GENERAL DESCRIPTION
The
ADG819
is a monolithic, CMOS, single-pole, double-throw
(SPDT) switch. This switch is designed on a submicron process
that provides low power dissipation yet gives high switching
speed, low on resistance, and low leakage currents.
Low power consumption and an operating supply range of
1.8 V to 5.5 V make the
ADG819
ideal for battery-powered,
portable instruments.
Each switch of the
ADG819
conducts equally well in both
directions when on. The
ADG819
exhibits break-before-make
switching action, thus preventing momentary shorting when
switching channels.
The
ADG819
is available in a 6-lead SOT-23 package, an 8-lead
MSOP package, and in a 6-ball WLCSP package. This chip
occupies only a 1.14 mm × 2.18 mm area, making it the ideal
candidate for space-constrained applications.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
Very low on resistance, 0.5 Ω typical.
1.8 V to 5.5 V single-supply operation.
High current carrying capability.
Tiny 6-lead SOT-23, 8-lead MSOP, and 6-ball, 1.14 mm ×
2.18 mm WLCSP packages.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
www.analog.com
Tel: 781.329.4700
Fax: 781.461.3113 ©2002–2012 Analog Devices, Inc. All rights reserved.
02801-001
ADG819
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings ............................................................ 5
Data Sheet
ESD Caution...................................................................................5
Pin Configurations and Function Descriptions ............................6
Typical Performance Characteristics ..............................................7
Test Circuits........................................................................................9
Terminology .................................................................................... 11
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 13
REVISION HISTORY
5/12—Rev. 0 to Rev. A
Updated Format .................................................................. Universal
Deleted ADG820 ................................................................ Universal
Changes to General Description .................................................... 1
Changes to Table 1 ............................................................................ 3
Changes to Table 2 ............................................................................ 4
Change to WLCSP θ
JA
Thermal Impedance Parameter,
Table 3 ................................................................................................ 5
Added Table 5 and Table 6; Renumbered Sequentially ............... 6
Deleted Test Circuit 6; Renumbered Sequentially ....................... 8
Changes to Figure 11 to Figure 14.................................................. 8
Changes to Terminology Section.................................................. 11
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 13
5/02—Revision 0: Initial Version
Rev. A | Page 2 of 16
Data Sheet
SPECIFICATIONS
V
DD
= 5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, R
ON 1
On Resistance Match Between
Channels, ΔR
ON1
On Resistance Flatness, R
1
FLAT(ON)
ADG819
25°C
−40°C to
+85°C
–40°C to
+125°C
0 V to V
DD
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
V min
V max
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
pF typ
pF typ
μA typ
μA max
Test Conditions/Comments
0.5
0.6
0.06
0.08
0.1
0.17
±0.01
±0.25
±0.01
±0.25
V
S
= 0 V to V
DD
, I
S
= 100 mA; see Figure 16
V
S
= 0 V to V
DD
, I
S
= 100 mA
0.7
0.8
0.1
0.2
0.12
0.25
V
S
= 0 V to V
DD
, I
S
= 100 mA
V
DD
= 5.5 V
V
S
= 4.5 V/1 V, V
D
= 1 V/4.5 V; see Figure 17
V
S
= V
D
= 1 V, or V
S
= V
D
= 4.5 V; see Figure 18
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off)
Channel On Leakage, I
D
, I
S
(On)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
2
t
ON
t
OFF
Break-Before-Make Time Delay,
t
BBM
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Bandwidth, –3 dB
C
S
(Off)
C
D
, C
S
(On)
POWER REQUIREMENTS
I
DD
1
2
±3
±3
±10
±25
2.0
0.8
0.005
±0.1
5
35
45
10
16
5
V
IN
= V
INL
or V
INH
R
L
= 50 Ω, C
L
= 35 pF, V
S
= 3 V; see Figure 19
R
L
= 50 Ω, C
L
= 35 pF, V
S
= 3 V; see Figure 19
R
L
= 50 Ω, C
L
= 35 pF, V
S1
= V
S2
= 3 V; see Figure 20
50
18
55
21
1
20
–71
–72
17
80
300
0.001
1.0
On resistance parameters tested with I
S
= 10 mA.
Guaranteed by design; not subject to production test.
V
S
= 2.5 V, R
S
= 0 Ω, C
L
= 1 nF; see Figure 21
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz; see Figure 22
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz; see Figure 24
R
L
= 50 Ω, C
L
= 5 pF; see Figure 23
f = 1 MHz
f = 1 MHz
V
DD
= 5.5 V, digital inputs = 0 V or 5.5 V
2.0
Rev. A | Page 3 of 16
ADG819
V
DD
= 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, R
ON1
On Resistance Match Between
Channels, ΔR
ON1
On Resistance Flatness, R
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off)
1
FLAT(ON)
Data Sheet
25°C
–40°C to
+85°C
–40°C to
+125°C
0 V to V
DD
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
nA typ
nA max
nA typ
nA max
V min
V max
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
pF typ
pF typ
μA typ
μA max
Test Conditions/Comments
0.7
1.4
0.06
V
S
= 0 V to V
DD
, I
S
= 100 mA; see Figure 16
V
S
= 0 V to V
DD
, I
S
= 100 mA
1.5
1.6
0.13
0.25
±0.01
±0.25
±0.01
±0.25
0.13
V
S
= 0 V to V
DD
, I
S
= 100 mA
V
DD
= 3.6 V
V
S
= 3.3 V/1 V, V
D
= 1 V/3.3 V; see Figure 17
V
S
= V
D
= 1 V, or V
S
= V
D
= 3.3 V; see Figure 18
±3
±3
±10
±25
2.0
0.8
Channel On Leakage, I
D
, I
S
(On)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
2
t
ON
t
OFF
Break-Before-Make Time Delay,
t
BBM
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Bandwidth, –3 dB
C
S
(Off)
C
D
, C
S
(On)
POWER REQUIREMENTS
I
DD
1
2
0.005
±0.1
5
40
60
10
16
40
V
IN
= V
INL
or V
INH
R
L
= 50 Ω, C
L
= 35 pF, V
S
= 1.5 V; see Figure 19
R
L
= 50 Ω, C
L
= 35 pF, V
S
= 1.5 V; see Figure 19
R
L
= 50 Ω, C
L
= 35 pF, V
S1
= V
S2
= 1.5 V; see Figure 20
65
18
70
21
1
10
−71
−72
17
80
300
0.001
1.0
On resistance parameters tested with I
S
= 10 mA.
Guaranteed by design; not subject to production test.
V
S
= 1.5 V, R
S
= 0 Ω,C
L
= 1 nF; see Figure 21
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz; see Figure 22
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz; see Figure 24
R
L
= 50 Ω, C
L
= 5 pF; see Figure 23
f = 1 MHz
f = 1 MHz
V
DD
= 3.6 V, digital Inputs = 0 V or 3.6 V
2.0
Rev. A | Page 4 of 16
Data Sheet
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted
Table 3.
Parameter
V
DD
to GND
Analog Inputs
1
Digital Inputs
1
Peak Current, Sx or D
Continuous Current, Sx or D
Operating Temperature Range
Industrial
Automotive
Storage Temperature Range
Junction Temperature
MSOP
θ
JA
Thermal Impedance
θ
JC
Thermal Impedance
SOT-23 (4-Layer Board)
θ
JA
Thermal Impedance
WLCSP (4-Layer Board)
θ
JA
Thermal Impedance
Lead Temperature, Soldering
(10 sec)
IR Reflow, Peak Temperature
(<20 sec)
1
ADG819
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Only one absolute maximum rating can be applied at any
one time.
Table 4. Truth Table for the
ADG819
IN
0
1
Switch S1
On
Off
Switch S2
Off
On
Rating
−0.3 V to +7 V
−0.3 V to V
DD
+ 0.3 V or 30 mA,
whichever occurs first
−0.3 V to V
DD
+ 0.3 V or 30 mA,
whichever occurs first
400 mA (pulsed at 1 ms, 10%
duty cycle maximum)
200 mA
−40°C to +85°C
−40°C to +125°C
−65°C to +150°C
150°C
206°C/W
44°C/W
119°C/W
80°C/W
300°C
235°C
ESD CAUTION
Overvoltages at IN, Sx, or D are clamped by internal diodes. Current should
be limited to the maximum ratings given.
Rev. A | Page 5 of 16
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