2Gb: x4, x8, x16 DDR2 SDRAM
Features
DDR2 SDRAM
MT47H512M4 – 64 Meg x 4 x 8 banks
MT47H256M8 – 32 Meg x 8 x 8 banks
MT47H128M16 – 16 Meg x 16 x 8 banks
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
V
DD
= 1.8V ±0.1V, V
DDQ
= 1.8V ±0.1V
JEDEC-standard 1.8V I/O (SSTL_18-compatible)
Differential data strobe (DQS, DQS#) option
4n-bit prefetch architecture
Duplicate output strobe (RDQS) option for x8
DLL to align DQ and DQS transitions with CK
8 internal banks for concurrent operation
Programmable CAS latency (CL)
Posted CAS additive latency (AL)
WRITE latency = READ latency - 1
t
CK
Programmable burst lengths: 4 or 8
Adjustable data-output drive strength
64ms, 8192-cycle refresh
On-die termination (ODT)
Industrial temperature (IT) option
RoHS-compliant
Supports JEDEC clock jitter specification
Options
1
• Configuration
– 512 Meg x 4 (64 Meg x 4 x 8 banks)
– 256 Meg x 8 (32 Meg x 8 x 8 banks)
– 128 Meg x 16 (16 Meg x 16 x 8 banks)
• FBGA package (Pb-free) – x16
– 84-ball FBGA (11.5mm x 14mm) Rev. A
• FBGA package (Pb-free) – x4, x8
– 60-ball FBGA (11.5mm x 14mm) Rev. A
• FBGA package (Pb-free) – x16
– 84-ball FBGA (9mm x 12.5mm) Rev. C
• FBGA package (Pb-free) – x4, x8
– 60-ball FBGA (9mm x 11.5mm) Rev. C
• FBGA package (Lead solder) – x16
– 84-ball FBGA (9mm x 12.5mm) Rev. C
• Timing – cycle time
– 1.875ns @ CL = 7 (DDR2-1066)
– 2.5ns @ CL = 5 (DDR2-800)
– 2.5ns @ CL = 6 (DDR2-800)
– 3.0ns @ CL = 5 (DDR2-667)
• Self refresh
– Standard
• Operating temperature
– Commercial (0°C T
C
+85°C)
– Industrial (–40°C T
C
+95°C;
–40°C T
A
+85°C)
• Revision
Note:
Marking
512M4
256M8
128M16
HG
HG
RT
EB
PK
-187E
-25E
-25
-3
None
None
IT
:A/:C
1. Not all options listed can be combined to
define an offered product. Use the Part
Catalog Search on
www.micron.com
for
product offerings and availability.
CCMTD-1725822587-6523
2Gb_DDR2.pdf – Rev. J 09/18 EN
1
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2006 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.
2Gb: x4, x8, x16 DDR2 SDRAM
Features
Table 1: Key Timing Parameters
Data Rate (MHz)
Speed Grade
-187E
-25E
-25
-3
CL = 3
400
400
400
400
CL = 4
533
533
533
533
CL = 5
800
800
667
667
CL = 6
800
800
800
n/a
CL = 7
1066
n/a
n/a
n/a
t
RC
(ns)
54
55
55
55
Table 2: Addressing
Parameter
Configuration
Refresh count
Row address
Bank address
Column address
512 Meg x 4
64 Meg x 4 x 8 banks
8K
A[14:0] (32K)
BA[2:0] (8)
A[11, 9:0] (2K)
256 Meg x 8
32 Meg x 8 x 8 banks
8K
A[14:0] (32K)
BA[2:0] (8)
A[9:0] (1K)
128 Meg x 16
16 Meg x 16 x 8 banks
8K
A[13:0] (16K)
BA[2:0] (8)
A[9:0] (1K)
Part Numbers
Figure 1: 2Gb DDR2 Part Numbers
Example Part Number:
MT47H256M8EB-25 :C
-
MT47H
Configuration
Package
Speed
:
Revision
Configuration
512 Meg x 4
256 Meg x 8
128 Meg x 16
Package
84-Ball 11.5mm x 14mm FBGA
60-Ball 11.5mm x 14mm FBGA
84-Ball 9.0mm x 12.5mm FBGA
60-Ball 9.0mm x 11.5mm FBGA
84-Ball 9.0mm x 12.5mm FBGA (lead solder)
HG
HG
RT
EB
PK
-187E
-25E
-25
-3
512M4
256M8
128M16
Power
Standard
:A/:C
Revision
IT
Industrial Temperature
Blank
Speed Grade
tCK = 1.875ns, CL = 7
tCK = 2.5ns, CL = 5
tCK = 2.5ns, CL = 6
tCK = 3ns, CL = 5
Note:
1. Not all speeds and configurations are available.
FBGA Part Number System
Due to space limitations, FBGA-packaged components have an abbreviated part marking that is different from the
part number. For a quick conversion of an FBGA code, see the FBGA Part Marking Decoder on Micron’s Web site:
http://www.micron.com.
CCMTD-1725822587-6523
2Gb_DDR2.pdf – Rev. J 09/18 EN
2
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2006 Micron Technology, Inc. All rights reserved.
2Gb: x4, x8, x16 DDR2 SDRAM
Features
Contents
Important Notes and Warnings ......................................................................................................................... 8
State Diagram .................................................................................................................................................. 9
Functional Description ................................................................................................................................... 10
Industrial Temperature ............................................................................................................................... 10
General Notes ............................................................................................................................................ 11
Functional Block Diagrams ............................................................................................................................. 12
Ball Assignments and Descriptions ................................................................................................................. 15
Packaging ...................................................................................................................................................... 19
Package Dimensions ................................................................................................................................... 19
FBGA Package Capacitance ......................................................................................................................... 23
Electrical Specifications – Absolute Ratings ..................................................................................................... 24
Temperature and Thermal Impedance ........................................................................................................ 24
Electrical Specifications – I
DD
Parameters ........................................................................................................ 27
I
DD
Specifications and Conditions ............................................................................................................... 27
I
DD7
Conditions .......................................................................................................................................... 27
AC Timing Operating Specifications ................................................................................................................ 33
AC and DC Operating Conditions .................................................................................................................... 45
ODT DC Electrical Characteristics ................................................................................................................... 46
Input Electrical Characteristics and Operating Conditions ............................................................................... 47
Output Electrical Characteristics and Operating Conditions ............................................................................. 50
Output Driver Characteristics ......................................................................................................................... 52
Power and Ground Clamp Characteristics ....................................................................................................... 56
AC Overshoot/Undershoot Specification ......................................................................................................... 57
Input Slew Rate Derating ................................................................................................................................ 59
Commands .................................................................................................................................................... 72
Truth Tables ............................................................................................................................................... 72
DESELECT ................................................................................................................................................. 76
NO OPERATION (NOP) ............................................................................................................................... 77
LOAD MODE (LM) ...................................................................................................................................... 77
ACTIVATE .................................................................................................................................................. 77
READ ......................................................................................................................................................... 77
WRITE ....................................................................................................................................................... 77
PRECHARGE .............................................................................................................................................. 78
REFRESH ................................................................................................................................................... 78
SELF REFRESH ........................................................................................................................................... 78
Mode Register (MR) ........................................................................................................................................ 78
Burst Length .............................................................................................................................................. 79
Burst Type .................................................................................................................................................. 80
Operating Mode ......................................................................................................................................... 80
DLL RESET ................................................................................................................................................. 80
Write Recovery ........................................................................................................................................... 81
Power-Down Mode ..................................................................................................................................... 81
CAS Latency (CL) ........................................................................................................................................ 82
Extended Mode Register (EMR) ....................................................................................................................... 83
DLL Enable/Disable ................................................................................................................................... 84
Output Drive Strength ................................................................................................................................ 84
DQS# Enable/Disable ................................................................................................................................. 84
RDQS Enable/Disable ................................................................................................................................. 84
Output Enable/Disable ............................................................................................................................... 84
On-Die Termination (ODT) ......................................................................................................................... 85
CCMTD-1725822587-6523
2Gb_DDR2.pdf – Rev. J 09/18 EN
3
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2006 Micron Technology, Inc. All rights reserved.
2Gb: x4, x8, x16 DDR2 SDRAM
Features
Off-Chip Driver (OCD) Impedance Calibration ............................................................................................ 85
Posted CAS Additive Latency (AL) ................................................................................................................ 85
Extended Mode Register 2 (EMR2) ................................................................................................................... 87
Extended Mode Register 3 (EMR3) ................................................................................................................... 88
Initialization .................................................................................................................................................. 89
ACTIVATE ...................................................................................................................................................... 92
READ ............................................................................................................................................................. 94
READ with Precharge .................................................................................................................................. 98
READ with Auto Precharge ......................................................................................................................... 100
WRITE .......................................................................................................................................................... 105
PRECHARGE ................................................................................................................................................. 115
REFRESH ...................................................................................................................................................... 116
SELF REFRESH .............................................................................................................................................. 117
Power-Down Mode ........................................................................................................................................ 119
Precharge Power-Down Clock Frequency Change ........................................................................................... 126
Reset ............................................................................................................................................................. 127
CKE Low Anytime ...................................................................................................................................... 127
ODT Timing .................................................................................................................................................. 129
MRS Command to ODT Update Delay ........................................................................................................ 131
CCMTD-1725822587-6523
2Gb_DDR2.pdf – Rev. J 09/18 EN
4
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2006 Micron Technology, Inc. All rights reserved.
2Gb: x4, x8, x16 DDR2 SDRAM
Features
List of Tables
Table 1: Key Timing Parameters ....................................................................................................................... 2
Table 2: Addressing ......................................................................................................................................... 2
Table 3: FBGA 84-Ball – x16 and 60-Ball – x4, x8 Descriptions .......................................................................... 17
Table 4: Input Capacitance ............................................................................................................................ 23
Table 5: Absolute Maximum DC Ratings ......................................................................................................... 24
Table 6: Temperature Limits .......................................................................................................................... 25
Table 7: Thermal Impedance ......................................................................................................................... 26
Table 8: General I
DD
Parameters ..................................................................................................................... 27
Table 9: I
DD7
Timing Patterns (8-Bank Interleave READ Operation) ................................................................. 28
Table 10: DDR2 I
DD
Specifications and Conditions (Die Revision A) ................................................................. 29
Table 11: DDR2 I
DD
Specifications and Conditions (Die Revision C) ................................................................ 31
Table 12: AC Operating Specifications and Conditions .................................................................................... 33
Table 13: Recommended DC Operating Conditions (SSTL_18) ........................................................................ 45
Table 14: ODT DC Electrical Characteristics ................................................................................................... 46
Table 15: Input DC Logic Levels ..................................................................................................................... 47
Table 16: Input AC Logic Levels ...................................................................................................................... 47
Table 17: Differential Input Logic Levels ......................................................................................................... 48
Table 18: Differential AC Output Parameters ................................................................................................... 50
Table 19: Output DC Current Drive ................................................................................................................ 50
Table 20: Output Characteristics .................................................................................................................... 51
Table 21: Full Strength Pull-Down Current (mA) ............................................................................................. 52
Table 22: Full Strength Pull-Up Current (mA) .................................................................................................. 53
Table 23: Reduced Strength Pull-Down Current (mA) ...................................................................................... 54
Table 24: Reduced Strength Pull-Up Current (mA) .......................................................................................... 55
Table 25: Input Clamp Characteristics ............................................................................................................ 56
Table 26: Address and Control Balls ................................................................................................................ 57
Table 27: Clock, Data, Strobe, and Mask Balls ................................................................................................. 57
Table 28: AC Input Test Conditions ................................................................................................................ 57
Table 29: DDR2-400/533 Setup and Hold Time Derating Values (
t
IS and
t
IH) .................................................... 60
Table 30: DDR2-667/800/1066 Setup and Hold Time Derating Values (
t
IS and
t
IH) ........................................... 61
Table 31: DDR2-400/533
t
DS,
t
DH Derating Values with Differential Strobe ...................................................... 64
Table 32: DDR2-667/800/1066
t
DS,
t
DH Derating Values with Differential Strobe ............................................. 65
Table 33: Single-Ended DQS Slew Rate Derating Values Using
t
DS
b
and
t
DH
b
................................................... 66
Table 34: Single-Ended DQS Slew Rate Fully Derated (DQS, DQ at V
REF
) at DDR2-667 ...................................... 66
Table 35: Single-Ended DQS Slew Rate Fully Derated (DQS, DQ at V
REF
) at DDR2-533 ...................................... 67
Table 36: Single-Ended DQS Slew Rate Fully Derated (DQS, DQ at V
REF
) at DDR2-400 ...................................... 67
Table 37: Truth Table – DDR2 Commands ...................................................................................................... 72
Table 38: Truth Table – Current State Bank
n
– Command to Bank
n
................................................................ 73
Table 39: Truth Table – Current State Bank
n
– Command to Bank
m
............................................................... 75
Table 40: Minimum Delay with Auto Precharge Enabled ................................................................................. 76
Table 41: Burst Definition .............................................................................................................................. 80
Table 42: READ Using Concurrent Auto Precharge ......................................................................................... 100
Table 43: WRITE Using Concurrent Auto Precharge ....................................................................................... 106
Table 44: Truth Table – CKE .......................................................................................................................... 121
CCMTD-1725822587-6523
2Gb_DDR2.pdf – Rev. J 09/18 EN
5
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2006 Micron Technology, Inc. All rights reserved.
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