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MT40A1G16KNR-075:E TR

Description
Dynamic Random Access Memory DDR4 16G 1GX16 TFBGA
Categorysemiconductor    Memory IC    Dynamic random access memory   
File Size475KB,24 Pages
ManufacturerMicron
Websitehttp://www.micron.com/
Environmental Compliance
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MT40A1G16KNR-075:E TR Overview

Dynamic Random Access Memory DDR4 16G 1GX16 TFBGA

MT40A1G16KNR-075:E TR Parametric

Parameter NameAttribute value
MakerMicron
Product Categorydynamic random access memory
Package/boxDIE
seriesMT40A
EncapsulationReel
Factory packaging quantity2000
16Gb: x16 TwinDie Single Rank DDR4 SDRAM
Description
TwinDie™ 1.2V DDR4 SDRAM
MT40A1G16 – 64 Meg x 16 x 16 Banks x 1 Ranks
Description
The 16Gb (TwinDie™) DDR4 SDRAM uses
Micron’s 8Gb DDR4 SDRAM die; two x8s combined to
make one x16. Similar signals as mono x16, there is
one extra ZQ connection for faster ZQ Calibration and
a BG1 control required for x8 addressing. Refer to Mi-
cron’s 8Gb DDR4 SDRAM data sheet (x8 option) for
the specifications not included in this document.
Specifications for base part number MT40A1G8 corre-
late to TwinDie manufacturing part number
MT40A1G16.
Options
• Configuration
– 64 Meg x 16 x 16 banks x 1 rank
• 96-ball FBGA package (Pb-free)
– 9.5mm x 14mm x 1.2mm Die Rev :A
– 8.0mm x 14mm x 1.2mm Die Rev :B,
D
– 7.5mm x 13.5mm x 1.2mm Die Rev :E
• Timing – cycle time
1
– 0.625ns @ CL = 22 (DDR4-3200)
– 0.682ns @ CL = 21 (DDR4-2933)
– 0.750ns @ CL = 19 (DDR4-2666)
– 0.750ns @ CL = 18 (DDR4-2666)
– 0.833ns @ CL = 17(DDR4-2400)
– 0.833ns @ CL = 16 (DDR4-2400)
– 0.937ns @ CL = 15 (DDR4-2133)
– 1.071ns @ CL = 13 (DDR4-1866)
• Self refresh
– Standard
• Operating temperature
– Commercial (0°C
T
C
95°C)
• Revision
Marking
1G16
HBA
WBU
KNR
-062E
-068
-075
-075E
-083
-083E
-093E
-107E
None
None
:A
:B, D
:E
Features
Uses two x8 8Gb Micron die to make one x16
Single rank TwinDie
V
DD
= V
DDQ
= 1.2V (1.14–1.26V)
1.2V V
DDQ
-terminated I/O
JEDEC-standard ball-out
Low-profile package
T
C
of 0°C to 95°C
– 0°C to 85°C: 8192 refresh cycles in 64ms
– 85°C to 95°C: 8192 refresh cycles in 32ms
Note:
1. CL = CAS (READ) latency.
Table 1: Key Timing Parameters
Speed Grade
-062E
1
-068
1
-075
2
-075E
2
-083
3
-083E
3
-093E
4
-107E
5
Notes:
1.
2.
3.
4.
5.
Data Rate (MT/s)
3200
2933
2666
2666
2400
2400
2133
1866
Target
t
RCD-
t
RP-CL
22-22-22
21-21-21
19-19-19
18-18-18
17-17-17
16-16-16
15-15-15
13-13-13
t
RCD
(ns)
t
RP
(ns)
CL (ns)
13.75
14.32
14.25
13.5
14.16
13.32
14.06
13.92
13.75
14.32
14.25
13.5
14.16
13.32
14.06
13.92
13.75
14.32
14.25
13.5
14.16
13.32
14.06
13.92
Backward compatible to 1600, CL = 11; 1866, CL = 13; 2133, CL = 15; 2400, CL = 17; and 2666, CL = 19.
Backward compatible to 1600, CL = 11; 1866, CL = 13; 2133, CL = 15; and 2400, CL = 17.
Backward compatible to 1600, CL = 11; 1866, CL = 13; and 2133, CL = 15.
Backward compatible to 1600, CL = 11 and 1866, CL = 13.
Backward compatible to 1600, CL = 11.
CCMTD-1725822587-9947
DDR4_16Gb_x16_1CS_TwinDie.pdf - Rev. F 10/17 EN
1
Products and specifications discussed herein are subject to change by Micron without notice.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2015 Micron Technology, Inc. All rights reserved.

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Description Dynamic Random Access Memory DDR4 16G 1GX16 TFBGA Dynamic Random Access Memory DDR4 16G 1GX16 FBGA DDP Dynamic Random Access Memory DDR4 16G 1GX16 FBGA DDP
Maker Micron Micron Micron
Product Category dynamic random access memory dynamic random access memory dynamic random access memory
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Encapsulation Reel Reel Tray
Factory packaging quantity 2000 2000 1368
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