MT28EW512ABA1LJS-0SIT TR datasheet, PDF

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MT28EW512ABA1LJS-0SIT TR: DescriptionNOR flash EW-SERIES FLASH NOR SLC 32MX16 TSOP; Categorysemiconductor Memory IC NOR flash memory; File Size997KB，82 Pages; ManufacturerMicron; Websitehttp://www.micron.com/; Environmental Compliance

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MT28EW512ABA1LJS-0SIT TR Overview

NOR flash EW-SERIES FLASH NOR SLC 32MX16 TSOP

MT28EW512ABA1LJS-0SIT TR Parametric

Parameter Name	Attribute value
Maker	Micron
Product Category	NOR flash memory
Installation style	SMD/SMT
Package/box	TSOP-56
series	MT28EW
storage	512 Mbit
Interface Type	Parallel
organize	64 M x 8, 32 M x 16
Timing type	Asynchronous
Data bus width	8 bit, 16 bit
Supply voltage - min.	2.7 V
Supply voltage - max.	3.6 V
Supply current—max.	50 mA
Minimum operating temperature	- 40 C
Maximum operating temperature	+ 85 C
Encapsulation	Cut Tape
Encapsulation	MouseReel
Encapsulation	Reel
storage type	NOR
speed	95 ns
standard	Common Flash Interface (CFI)
Factory packaging quantity	1600

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512Mb: x8/x16, 3V, MT28EW Embedded Parallel NOR

Features

Parallel NOR Flash Embedded Memory

MT28EW512ABA

Features

• Single-level cell (SLC) technology

• Density: 512Mb

• Supply voltage

– V

= 2.7–3.6V (program, erase, read)

– V

CCQ

= 1.65 - V

(I/O buffers)

• Asynchronous random/page read

– Page size: 16 words or 32 bytes

– Page access: 20ns

– Random access: 95ns (V

= V

CCQ

= 2.7-3.6V)

– Random access: 100ns (V

CCQ

= 1.65-V

)

• Buffer program (512-word program buffer)

– 2.0 MB/s (TYP) when using full buffer program

– 2.5 MB/s (TYP) when using accelerated buffer

program (V

)

• Word/Byte program: 25us per word (TYP)

• Block erase (128KB): 0.2s (TYP)

• Memory organization

– Uniform blocks: 128KB or 64KW each

– x8/x16 data bus

• Program/erase suspend and resume capability

– Read from another block during a PROGRAM

SUSPEND operation

– Read or program another block during an ERASE

SUSPEND operation

• Unlock bypass, block erase, chip erase, and write to

buffer capability

• BLANK CHECK operation to verify an erased block

• CYCLIC REDUNDANCY CHECK (CRC) operation to

verify a program pattern

• V

/WP# protection

– Protects first or last block regardless of block

protection settings

• Software protection

– Volatile protection

– Nonvolatile protection

– Password protection

• Extended memory block

– 128-word (256-byte) block for permanent, secure

identification

– Programmed or locked at the factory or by the

customer

• JESD47-compliant

– 100,000 (minimum) ERASE cycles per block

– Data retention: 20 years (TYP)

• Package

– 56-pin TSOP 14 x 20mm (JS)

– 64-ball LBGA, 11 x 13mm (PC)

– 56-ball VFBGA, 7 x 9mm (PN)

• RoHS-compliant, halogen-free packaging

• Operating temperature

– Ambient: –40°C to +85°C

PDF: 09005aef855e354a

mt28ew_generation-b_512mb.pdf - Rev. I 05/18 EN

Products and specifications discussed herein are subject to change by Micron without notice.

Micron Technology, Inc. reserves the right to change products or specifications without notice.

512Mb: x8/x16, 3V, MT28EW Embedded Parallel NOR

Features

Contents

Important Notes and Warnings ......................................................................................................................... 7

General Description ......................................................................................................................................... 8

Signal Assignments ........................................................................................................................................... 9

Signal Descriptions ......................................................................................................................................... 12

Memory Organization .................................................................................................................................... 14

Memory Configuration ............................................................................................................................... 14

Memory Map ............................................................................................................................................. 14

Bus Operations ............................................................................................................................................... 15

Read .......................................................................................................................................................... 15

Write .......................................................................................................................................................... 15

Standby ..................................................................................................................................................... 16

Output Disable ........................................................................................................................................... 16

Reset .......................................................................................................................................................... 16

Registers ........................................................................................................................................................ 17

Data Polling Register .................................................................................................................................. 17

Lock Register .............................................................................................................................................. 22

Standard Command Definitions – Address-Data Cycles .................................................................................... 24

READ and AUTO SELECT Operations .............................................................................................................. 27

READ/RESET Command ............................................................................................................................ 27

READ CFI Command .................................................................................................................................. 27

AUTO SELECT Command ........................................................................................................................... 27

Read Electronic Signature ........................................................................................................................... 28

Cyclic Redundancy Check Operation ............................................................................................................... 29

CYCLIC REDUNDANCY CHECK Command ................................................................................................. 29

Cyclic Redundancy Check Operation Command Sequence .......................................................................... 29

Bypass Operations .......................................................................................................................................... 32

UNLOCK BYPASS Command ...................................................................................................................... 32

UNLOCK BYPASS RESET Command ............................................................................................................ 32

Program Operations ....................................................................................................................................... 33

PROGRAM Command ................................................................................................................................ 33

UNLOCK BYPASS PROGRAM Command ..................................................................................................... 33

WRITE TO BUFFER PROGRAM Command .................................................................................................. 33

UNLOCK BYPASS WRITE TO BUFFER PROGRAM Command ....................................................................... 36

WRITE TO BUFFER PROGRAM CONFIRM Command .................................................................................. 36

BUFFERED PROGRAM ABORT AND RESET Command ................................................................................ 36

PROGRAM SUSPEND Command ................................................................................................................ 36

PROGRAM RESUME Command .................................................................................................................. 37

ACCELERATED BUFFERED PROGRAM Operations .......................................................................................... 37

Erase Operations ............................................................................................................................................ 38

CHIP ERASE Command .............................................................................................................................. 38

UNLOCK BYPASS CHIP ERASE Command ................................................................................................... 38

BLOCK ERASE Command ........................................................................................................................... 38

UNLOCK BYPASS BLOCK ERASE Command ................................................................................................ 39

ERASE SUSPEND Command ....................................................................................................................... 39

ERASE RESUME Command ........................................................................................................................ 40

ACCELERATED CHIP ERASE Operations ......................................................................................................... 40

BLANK CHECK Operation .............................................................................................................................. 41

BLANK CHECK Commands ........................................................................................................................ 41

Device Protection ........................................................................................................................................... 42

Hardware Protection .................................................................................................................................. 42

PDF: 09005aef855e354a

mt28ew_generation-b_512mb.pdf - Rev. I 05/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

512Mb: x8/x16, 3V, MT28EW Embedded Parallel NOR

Features

Software Protection ....................................................................................................................................

Volatile Protection Mode .............................................................................................................................

Nonvolatile Protection Mode ......................................................................................................................

Password Protection Mode ..........................................................................................................................

Block Protection Command Definitions – Address-Data Cycles ........................................................................

Protection Operations ....................................................................................................................................

LOCK REGISTER Commands ......................................................................................................................

PASSWORD PROTECTION Commands .......................................................................................................

NONVOLATILE PROTECTION Commands ..................................................................................................

NONVOLATILE PROTECTION BIT LOCK BIT Commands ............................................................................

VOLATILE PROTECTION Commands ..........................................................................................................

EXTENDED MEMORY BLOCK Commands ..................................................................................................

EXIT PROTECTION Command ....................................................................................................................

Common Flash Interface ................................................................................................................................

Power-Up and Reset Characteristics ................................................................................................................

Absolute Ratings and Operating Conditions .....................................................................................................

DC Characteristics ..........................................................................................................................................

Read AC Characteristics ..................................................................................................................................

Write AC Characteristics .................................................................................................................................

Data Polling/Toggle AC Characteristics ............................................................................................................

Program/Erase Characteristics ........................................................................................................................

Package Dimensions .......................................................................................................................................

Revision History .............................................................................................................................................

Rev. I –05/18 ...............................................................................................................................................

Rev. H – 11/16 .............................................................................................................................................

Rev. G – 4/16 ..............................................................................................................................................

Rev. F – 4/15 ...............................................................................................................................................

Rev. E – 1/15 ...............................................................................................................................................

Rev. D – 11/14 .............................................................................................................................................

Rev. C – 9/14 ...............................................................................................................................................

Rev. B – 3/14 ...............................................................................................................................................

Rev. A – 9/13 ...............................................................................................................................................

PDF: 09005aef855e354a

mt28ew_generation-b_512mb.pdf - Rev. I 05/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

512Mb: x8/x16, 3V, MT28EW Embedded Parallel NOR

Features

List of Figures

Figure 1: Part Number Chart ............................................................................................................................ 2

Figure 2: Logic Diagram ................................................................................................................................... 8

Figure 3: 56-Pin TSOP (Top View) .................................................................................................................... 9

Figure 4: 64-Ball LBGA (Top View – Balls Down) ............................................................................................. 10

Figure 5: 56-Ball VFBGA (Top View – Balls Down) ........................................................................................... 11

Figure 6: Data Polling Flowchart .................................................................................................................... 19

Figure 7: Toggle Bit Flowchart ........................................................................................................................ 20

Figure 8: Data Polling/Toggle Bit Flowchart .................................................................................................... 21

Figure 9: Lock Register Program Flowchart ..................................................................................................... 23

Figure 10: Boundary Condition of Program Buffer Size .................................................................................... 34

Figure 11: WRITE TO BUFFER PROGRAM Flowchart ...................................................................................... 35

Figure 12: Software Protection Scheme .......................................................................................................... 44

Figure 13: Set/Clear Nonvolatile Protection Bit Algorithm Flowchart ............................................................... 50

Figure 14: Power-Up Timing .......................................................................................................................... 57

Figure 15: Reset AC Timing – No PROGRAM/ERASE Operation in Progress ...................................................... 58

Figure 16: Reset AC Timing During PROGRAM/ERASE Operation .................................................................... 58

Figure 17: AC Measurement Load Circuit ....................................................................................................... 60

Figure 18: AC Measurement I/O Waveform ..................................................................................................... 60

Figure 19: Random Read AC Timing (8-Bit Mode) ........................................................................................... 64

Figure 20: Random Read AC Timing (16-Bit Mode) ......................................................................................... 65

Figure 21: BYTE# Transition Read AC Timing .................................................................................................. 65

Figure 22: Page Read AC Timing (16-Bit Mode) ............................................................................................... 66

Figure 23: WE#-Controlled Program AC Timing (8-Bit Mode) .......................................................................... 68

Figure 24: WE#-Controlled Program AC Timing (16-Bit Mode) ......................................................................... 69

Figure 25: CE#-Controlled Program AC Timing (8-Bit Mode) ........................................................................... 71

Figure 26: CE#-Controlled Program AC Timing (16-Bit Mode) ......................................................................... 72

Figure 27: Chip/Block Erase AC Timing (16-Bit Mode) .................................................................................... 73

Figure 28: Accelerated Program AC Timing ..................................................................................................... 73

Figure 29: Data Polling AC Timing .................................................................................................................. 74

Figure 30: Toggle/Alternative Toggle Bit Polling AC Timing .............................................................................. 75

Figure 31: 56-Pin TSOP – 14mm x 20mm (Package Code: JS) ............................................................................ 78

Figure 32: 64-Ball LBGA – 11mm x 13mm (Package Code: PC) ......................................................................... 79

Figure 33: 56-Ball VFBGA – 7mm x 9mm (Package Code: PN) .......................................................................... 80

PDF: 09005aef855e354a

mt28ew_generation-b_512mb.pdf - Rev. I 05/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

MT28EW512ABA1LJS-0SIT TR Related Products

	MT28EW512ABA1LJS-0SIT TR	MT28EW512ABA1HJS-0SIT TR	MT28EW512ABA1HPC-0SIT TR	MT28EW512ABA1LPN-0SIT TR
Description	NOR flash EW-SERIES FLASH NOR SLC 32MX16 TSOP	NOR flash EW-SERIES FLASH NOR SLC 32MX16 TSOP	NOR flash EW-SERIES FLASH NOR SLC 32MX16 LBGA	NOR flash EW-SERIES FLASH NOR SLC 32MX16 VFBGA
Maker	Micron	Micron	Micron	Micron
Product Category	NOR flash memory	NOR flash memory	NOR flash memory	NOR flash memory
Installation style	SMD/SMT	SMD/SMT	SMD/SMT	SMD/SMT
Package/box	TSOP-56	TSOP-56	LBGA-64	VFBGA-56
series	MT28EW	MT28EW	MT28EW	MT28EW
storage	512 Mbit	512 Mbit	512 Mbit	512 Mbit
Interface Type	Parallel	Parallel	Parallel	Parallel
organize	64 M x 8, 32 M x 16	64 M x 8, 32 M x 16	64 M x 8, 32 M x 16	64 M x 8, 32 M x 16
Timing type	Asynchronous	Asynchronous	Asynchronous	Asynchronous
Data bus width	8 bit, 16 bit	8 bit, 16 bit	8 bit, 16 bit	8 bit, 16 bit
Supply voltage - min.	2.7 V	2.7 V	2.7 V	2.7 V
Supply voltage - max.	3.6 V	3.6 V	3.6 V	3.6 V
Supply current—max.	50 mA	50 mA	50 mA	50 mA
Minimum operating temperature	- 40 C	- 40 C	- 40 C	- 40 C
Maximum operating temperature	+ 85 C	+ 85 C	+ 85 C	+ 85 C
storage type	NOR	NOR	NOR	NOR
speed	95 ns	95 ns	95 ns	95 ns
standard	Common Flash Interface (CFI)	Common Flash Interface (CFI)	Common Flash Interface (CFI)	Common Flash Interface (CFI)
Factory packaging quantity	1600	1600	2000	2500
Encapsulation	Reel	Reel	Reel	Reel

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