DS2502P-E48+T&R datasheet, PDF

Datasheet> All Categories > storage> storage> DS2502P-E48+T&R

DS2502P-E48+T&R: DescriptionErasable Programmable ROM 1Kb Add-Only Memory; Categorystorage storage; File Size227KB，5 Pages; ManufacturerMaxim; Websitehttps://www.maximintegrated.com/en.html; Environmental Compliance

Download Datasheet Parametric Compare View All

DS2502P-E48+T&R Overview

Erasable Programmable ROM 1Kb Add-Only Memory

DS2502P-E48+T&R Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Parts packaging code	SOIC
package instruction	SOC, SOC6,.17
Contacts	6
Reach Compliance Code	compliant
ECCN code	EAR99
Factory Lead Time	6 weeks
I/O type	COMMON
JESD-30 code	R-PDSO-C6
JESD-609 code	e3
length	3.937 mm
memory density	1024 bit
Memory IC Type	OTP ROM
memory width	1
Humidity sensitivity level	1
Number of functions	1
Number of terminals	6
word count	1024 words
character code	1000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	1KX1
Package body material	PLASTIC/EPOXY
encapsulated code	SOC
Encapsulate equivalent code	SOC6,.17
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Parallel/Serial	SERIAL
Peak Reflow Temperature (Celsius)	260
power supply	3/5 V
Certification status	Not Qualified
Maximum seat height	1.5 mm
Maximum standby current	0.000005 A
Maximum slew rate	0.000005 mA
Maximum supply voltage (Vsup)	6 V
Minimum supply voltage (Vsup)	2.8 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn)
Terminal form	C BEND
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	3.81 mm
Base Number Matches	1

Preview

Download Datasheet

View All

19-5071; 12/09

DS2502-E48

48-Bit Node Address Chip

www.maxim-ic.com

FEATURES



Factory programmed 48-bit node address

chip with 768 bits user-programmable OTP-

EPROM communicates with the economy of

one signal plus ground

Provides valid MAC-48/EUI-48 Ethernet

address

Unique, factory lasered and tested 64-bit

registration number assures absolute

traceability because no two parts are alike

Built-in multidrop controller ensures

compatibility with other 1-Wire

products

Device is an “add-only” memory where

additional data can be programmed into

EPROM without disturbing existing data

Reduces control, address, data, power and

programming signals to a single pin

Directly connects to a single port pin of a

microprocessor and communicates at up to

16.3kbps

Presence detector acknowledges when reader

first applies voltage

Low cost TO-92 or TSOC surface mount

packages

Reads over a wide voltage range of 2.8V to

6.0V from -40°C to +85°C; programs at

11.5V to 12.0V from -40°C to + 50°C

PIN CONFIGURATION

TO-92



BOTTOM VIEW

TSOC PACKAGE

TOP VIEW

ORDERING INFORMATION

PART

TEMP

PIN-

RANGE

PACKAGE

DS2502-E48+

-40°C to +85°C 3 TO-92

DS2502P-E48+

-40°C to +85°C 6 TSOC

DS2502P-E48+T&R -40°C to +85°C 6 TSOC

+ Denotes a lead(Pb)-free/RoHS-compliant package.

T&R = Tape and reel.

1-Wire is a registered trademark of Maxim Integrated Products, Inc.

DESCRIPTION

The DS2502-E48 is a variant of the DS2502 1024-bit add-only memory. It differs from the standard

DS2502 in its custom ROM family code 89h, and the UniqueWare Identifier 5E7h in place of the upper

12 bits of the standard ROM serialization field. Otherwise, the electrical and logical behavior is identical

to that of the DS2502. For technical details please refer to the DS2502 data sheet.

Note:

Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device

may be simultaneously available through various sales channels. For information about device errata, click here:

www.maxim-ic.com/errata.

1 of 4

DS2502P-E48+T&R Related Products

	DS2502P-E48+T&R	DS2502-E48+
Description	Erasable Programmable ROM 1Kb Add-Only Memory	Erasable Programmable ROM 1Kb Add-Only Memory
Is it lead-free?	Lead free	Lead free
Is it Rohs certified?	conform to	conform to
Parts packaging code	SOIC	TO-92
package instruction	SOC, SOC6,.17	, SIP3,.1,50
Contacts	6	3
Reach Compliance Code	compliant	compliant
ECCN code	EAR99	EAR99
Factory Lead Time	6 weeks	6 weeks
I/O type	COMMON	COMMON
JESD-30 code	R-PDSO-C6	O-PBCY-T3
JESD-609 code	e3	e3
memory density	1024 bit	1024 bit
Memory IC Type	OTP ROM	OTP ROM
memory width	1	1
Number of functions	1	1
Number of terminals	6	3
word count	1024 words	1024 words
character code	1000	1000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
organize	1KX1	1KX1
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
Encapsulate equivalent code	SOC6,.17	SIP3,.1,50
Package shape	RECTANGULAR	ROUND
Package form	SMALL OUTLINE	CYLINDRICAL
Parallel/Serial	SERIAL	SERIAL
Peak Reflow Temperature (Celsius)	260	260
power supply	3/5 V	3/5 V
Certification status	Not Qualified	Not Qualified
Maximum standby current	0.000005 A	0.000005 A
Maximum slew rate	0.000005 mA	0.000005 mA
Maximum supply voltage (Vsup)	6 V	6 V
Minimum supply voltage (Vsup)	2.8 V	2.8 V
surface mount	YES	NO
technology	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal surface	Matte Tin (Sn)	Matte Tin (Sn)
Terminal form	C BEND	THROUGH-HOLE
Terminal pitch	1.27 mm	1.27 mm
Terminal location	DUAL	BOTTOM
Maximum time at peak reflow temperature	30	30
Base Number Matches	1	1

Recommended Resources

LED cycle lighting circuit controlled by 12C508A

Home stolen phone automatic alarm circuit

Infrared electric curtain control circuit

Practical circuit diagram of non-isolated 12V DC regulator composed of UC3889

Homemade nickel-cadmium battery automatic charger circuit

555 fan automatic controller circuit

Please help me figure out what this "NB!" means: Can you please help me figure out what this "NB!" means? [url=http://processors.wiki.ti.com/index.php/CC2541_Dual_Stack]http://processors.wiki.ti.com/index.php/CC2541_Dual_Stack[/url] In the blue circ...; wangfuchong Talking

Matlab Lesson 5 - Plotting Symbolic Variables: This was mentioned before ezplot...; gaoxiao Microcontroller MCU

What is oc gate: [size=4]In actual use, sometimes it is necessary to connect the output ends of two or more NAND gates to the same wire, and transmit the data (status) on these NAND gates through the same wire. Theref...; Aguilera Analogue and Mixed Signal

Have you studied the OpenSparc chip? Can you give me some advice?: What is the value of this chip? What do you think of it?...; swayz88 Embedded System

[Xiao Meige FPGA Advanced Tutorial] The use of MC8051 soft core on FPGA: [b]2.2 Assembly of MC8051 core[/b] [color=#000][size=15px]So far, all the modules for RTL level implementation of MC8051 core are available. Next, we will assemble these modules together to get a Quar...; 芯航线跑堂 FPGA/CPLD

System and Chip Architect: A large domestic IC design company is recruiting system architects (chips). The work location is Shenzhen, five days and eight hours, generous benefits, annual salary is negotiable, self-recommendatio...; careerco Recruitment

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components