Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(T
A
= -40NC to +85NC, unless otherwise noted.) (Note 1)
PARAMETER
IO PIN: GENERAL DATA
1-Wire Pullup Voltage
1-Wire Pullup Resistance
Input Capacitance
Input Load Current
High-to-Low Switching Threshold
Input Low Voltage
Low-to-High Switching Threshold
Switching Hysteresis
Output Low Voltage
Recovery Time
Time-Slot Duration
Reset Low Time
Reset High Time
Presence-Detect Sample Time
IO PIN: 1-Wire WRITE
Write-Zero Low Time
Write-One Low Time
IO PIN: 1-Wire READ
Read Low Time
Read Sample Time
EEPROM
Programming Current
Programming Time for a 32-Bit
Segment or Page Protection
Programming Time for the Secret
Write/Erase Cycling Endurance
Data Retention
Maxim Integrated
SYMBOL
V
PUP
R
PUP
C
IO
I
L
V
TL
V
IL
V
TH
V
HY
V
OL
t
REC
t
SLOT
t
RSTL
t
RSTH
t
MSP
t
W0L
t
W1L
t
RL
t
MSR
I
PROG
t
PRD
t
PRS
N
CY
t
DR
(Note 2)
CONDITIONS
MIN
2.97
300
TYP
MAX
3.63
1500
UNITS
V
I
pF
FA
V
V
V
V
V
PUP
= 3.3V
Q
10% (Note 3)
(Notes 4, 5)
IO pin at V
PUP
(Notes 6, 7)
(Notes 2, 8)
(Notes 6, 9)
(Notes 6, 10)
I
OL
= 4mA (Note 11)
R
PUP
= 1500I (Notes 2, 12)
(Notes 2, 13)
(Note 2)
(Note 14)
(Notes 2, 15)
(Notes 2, 16)
(Notes 2, 16)
(Notes 2, 17)
(Notes 2, 17)
V
PUP
= 3.63V (Notes 5, 18)
Refer to the full data sheet.
T
A
= +85NC (Notes 21, 22)
T
A
= +85NC (Notes 23, 24, 25)
1500
5
0.65 x V
PUP
0.3
0.75 x V
PUP
0.3
0.4
5
13
48
48
8
8
1
1
t
RL
+
d
10
16
2
2-
d
2
1
80
19.5
V
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
mA
ms
ms
IO PIN: 1-Wire RESET, PRESENCE-DETECT CYCLE
100k
10
—
Years
2
ABRIDGED DATA SHEET
DS28E25
DeepCover Secure Authenticator with
1-Wire SHA-256 and 4Kb User EEPROM
ELECTRICAL CHARACTERISTICS (continued)
(T
A
= -40NC to +85NC, unless otherwise noted.) (Note 1)
PARAMETER
SHA-256 ENGINE
Computation Current
Computation Time
I
CSHA
t
CSHA
Refer to the full data sheet.
mA
ms
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Note 1:
Limits are 100% production tested at T
A
= +25°C and/or T
A
= +85°C. Limits over the operating temperature range and
relevant supply voltage range are guaranteed by design and characterization. Typical values are not guaranteed.
Note 2:
System requirement.
Note 3:
Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery
times. The specified value here applies to systems with only one device and with the minimum 1-Wire recovery times.
Note 4:
Typical value represents the internal parasite capacitance when V
PUP
is first applied. Once the parasite capacitance is
charged, it does not affect normal communication.
Note 5:
Guaranteed by design and/or characterization only; not production tested.
Note 6:
V
TL
, V
TH
, and V
HY
are a function of the internal supply voltage, which is a function of V
PUP
, R
PUP
, 1-Wire timing, and
capacitive loading on IO. Lower V
PUP
, higher R
PUP
, shorter t
REC
, and heavier capacitive loading all lead to lower values
of V
TL
, V
TH
, and V
HY
.
Note 7:
Voltage below which, during a falling edge on IO, a logic-zero is detected.
Note 8:
The voltage on IO must be less than or equal to V
ILMAX
at all times when the master is driving IO to a logic-zero level.
Note 9:
Voltage above which, during a rising edge on IO, a logic-one is detected.
Note 10:
After V
TH
is crossed during a rising edge on IO, the voltage on IO must drop by at least V
HY
to be detected as logic-zero.
Note 11:
The I-V characteristic is linear for voltages less than 1V.
Note 12:
Applies to a single device attached to a 1-Wire line.
Note 13:
Defines maximum possible bit rate. Equal to 1/(t
W0LMIN
+ t
RECMIN
).
Note 14:
An additional reset or communication sequence cannot begin until the reset high time has expired.
Note 15:
Interval after t
RSTL
during which a bus master can read a logic 0 on IO if there is a DS28E25 present. The power-up pres-
ence detect pulse could be outside this interval, but will be complete within 2ms after power-up.
Note 16:
ε
in
Figure 11
represents the time required for the pullup circuitry to pull the voltage on IO up from V
IL
to V
TH
. The actual
maximum duration for the master to pull the line low is t
W1LMAX
+ t
F
-
ε
and t
W0LMAX
+ t
F
-
ε,
respectively.
Note 17:
d
in
Figure 11
represents the time required for the pullup circuitry to pull the voltage on IO up from V
IL
to the input-high
threshold of the bus master. The actual maximum duration for the master to pull the line low is t
RLMAX
+ t
F
.
Note 18:
Current drawn from IO during the EEPROM programming interval or SHA-256 computation. The pullup circuit on IO during
the programming interval or SHA-256 computation should be such that the voltage at IO is greater than or equal to 2.0V.
Note 19: Refer to the full data sheet.
Note 20: Refer to the full data sheet.
Note
Note
Note
Note
21:
Write-cycle endurance is tested in compliance with JESD47G.
22:
Not 100% production tested; guaranteed by reliability monitor sampling.
23:
Data retention is tested in compliance with JESD47G.
24:
Guaranteed by 100% production test at elevated temperature for a shorter time; equivalence of this production test to the
data sheet limit at operating temperature range is established by reliability testing.
Note 25:
EEPROM writes can become nonfunctional after the data retention time is exceeded. Long-term storage at elevated tem-
peratures is not recommended.
Note 26: Refer to the full data sheet.
Maxim Integrated
3
ABRIDGED DATA SHEET
DS28E25
DeepCover Secure Authenticator with
1-Wire SHA-256 and 4Kb User EEPROM
Pin Configurations
BOTTOM VIEW
1
DS28E25
2
TOP VIEW
TOP VIEW
DS28E25
6 N.C.
DS28E25
5
4
N.C.
N.C.
N.C. 1
IO 2
GND 3
EP
+
+
GND
1
2
3
6 N.C.
28E25
ymrrF
5 N.C.
4 N.C.
IO
GND
IO
N.C.
SFN
(6mm x 6mm x 0.9mm)
TSOC
TDFN
(3mm × 3mm)
NOTE:
THE SFN PACKAGE IS QUALIFIED FOR ELECTRO-MECHANICAL CONTACT APPLICATIONS ONLY,
NOT FOR SOLDERING. FOR MORE INFORMATION, REFER TO APPLICATION NOTE 4132:
ATTACHMENT
METHODS FOR THE ELECTRO-MECHANICAL SFN PACKAGE.
SIDE VIEW
IO
N.C.
GND
1
2
3
FRONT VIEW
1
2
3
TO-92
Pin Descriptions
PIN
SFN
2
1
—
—
TO-92
3
1
2
—
TSOC
1
2
3, 4, 5, 6
—
TDFN-EP
3
2
1, 4, 5, 6
—
NAME
GND
IO
N.C.
EP
Ground Reference
1-Wire Bus Interface. Open-drain signal that requires an external
pullup resistor.
Not Connected
Exposed Pad (TDFN only). Solder evenly to the board’s ground plane
for proper operation. Refer to Application Note 3273:
Exposed Pads: A
Brief Introduction
for additional information.
FUNCTION
Maxim Integrated
4
ABRIDGED DATA SHEET
DS28E25
DeepCover Secure Authenticator with
1-Wire SHA-256 and 4Kb User EEPROM
Note to readers:
This document is an abridged version of the full data sheet. Additional device information is available
only in the full version of the data sheet. To request the full data sheet, go to
www.maximintegrated.com/DS28E25
and click on
Request Full Data Sheet.
Ordering Information
PART
DS28E25G+T
DS28E25+
DS28E25P+
DS28E25P+T
DS28E25Q+T
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
2 SFN (2.5k pcs)
2 TO-92
6 TSOC
6 TSOC (4k pcs)
6 TDFN-EP* (2.5k pcs)
Package Information
For the latest package outline information and land patterns (foot-
prints), go to
www.maximintegrated.com/packages.
Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but the
drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
2 SFN
2 TO-92
6 TSOC
6 TDFN-EP
PACKAGE
CODE
G266N+1
Q2+1
D6+1
T633+2
OUTLINE
NO.
21-0390
21-0249
21-0382
21-0137
LAND
PATTERN NO.
—
—
90-0321
90-0058
+Denotes
a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
*EP
= Exposed pad.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and
max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
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stm32/stm8
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