AIl other packages, excluding SFN...............................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(T
A
= -40°C to +85°C.) (Note 1)
PARAMETER
IO PIN: GENERAL DATA
1-Wire Pullup Voltage
1-Wire Pullup Resistance
Input Capacitance
Input Load Current
High-to-Low Switching Threshold
Input Low Voltage
Low-to-High Switching Threshold
Switching Hysteresis
Output Low Voltage
Recovery Time
(Notes 2,12)
Rising-Edge Hold-Off Time (Notes
5, 13)
Time Slot Duration
(Notes 2, 14)
V
PUP
R
PUP
C
IO
I
L
V
TL
V
IL
V
TH
V
HY
V
OL
(Note 2)
(Notes 2, 3)
(Notes 4, 5)
IO pin at V
PUP
(Notes 5, 6, 7)
(Notes 2, 8)
(Notes 5, 6, 9)
(Notes 5, 6, 10)
At 4mA (Note 11)
Standard speed, R
PUP
= 2.2kΩ
t
REC
Overdrive speed, R
PUP
= 2.2kΩ
Overdrive speed, directly prior to reset
pulse; R
PUP
= 2.2kΩ
Standard speed
Overdrive speed
Standard speed
Overdrive speed
Standard speed
Overdrive speed
Standard speed
Overdrive speed
Standard speed
Overdrive speed
Standard speed
Overdrive speed
5
2
5
0.5
65
8
480
48
15
2
60
8
60
6
640
80
60
6
240
24
75
10
5.0
µs
µs
µs
1.0
0.21
0.05
0.5
2.8
0.3
5.25
2.2
1000
6.7
V
PUP
-
1.8
0.5
V
PUP
-
1.0
1.70
0.4
V
kΩ
pF
µA
V
V
V
V
V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
t
REH
t
SLOT
Not applicable (0)
IO PIN: 1-Wire RESET, PRESENCE-DETECT CYCLE
Reset Low Time (Note 2)
Presence-Detect High Time
Presence-Detect Low Time
Presence-Detect Sample Time
(Notes 2, 15)
t
RSTL
t
PDH
t
PDL
t
MSP
µs
µs
µs
µs
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2
DS2431
1024-Bit, 1-Wire EEPROM
Electrical Characteristics (continued)
(T
A
= -40°C to +85°C.) (Note 1)
PARAMETER
IO PIN: 1-Wire WRITE
Write-Zero Low Time
(Notes 2, 16, 17)
Write-One Low Time
(Notes 2, 17)
IO PIN: 1-Wire READ
Read Low Time
(Notes 2, 18)
Read Sample Time
(Notes 2, 18)
EEPROM
Programming Current
Programming Time
Write/Erase Cycles (Endurance)
(Notes 22, 23)
Data Retention
(Notes 24, 25, 26)
Note 1:
Note 2:
Note 3:
I
PROG
t
PROG
N
CY
t
DR
(Notes 5, 19)
(Notes 20, 21)
At +25°C
At +85°C (worst case)
At +85°C (worst case)
200k
50k
40
0.8
10
mA
ms
—
Years
t
RL
t
MSR
Standard speed
Overdrive speed
Standard speed
Overdrive speed
5
1
t
RL
+
d
t
RL
+
d
15 -
d
2-
d
15
2
µs
µs
Standard speed
t
W0L
Overdrive speed, V
PUP
> 4.5V
Overdrive speed
t
W1L
Standard speed
Overdrive speed
60
5
6
1
1
120
15.5
15.5
15
2
µs
µs
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Note 4:
Note 5:
Note 6:
Note
Note
Note
Note
Note
Note
Note
Note
Note
7:
8:
9:
10:
11:
12:
13:
14:
15:
Note 16:
Note 17:
Note 18:
Limits are 100% production tested at T
A
= +25°C and/or T
A
= +85°C. Limits over the operating temperature range and rel-
evant supply voltage range are guaranteed by design and characterization. Typical values are not guaranteed.
System requirement.
Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery
times. The specified value here applies to systems with only one device and with the minimum 1-Wire recovery times.
For more heavily loaded systems, an active pullup such as that found in the DS2482-x00, DS2480B, or DS2490 may be
required.
Maximum value represents the internal parasite capacitance when V
PUP
is first applied. Once the parasite capacitance is
charged, it does not affect normal communication.
Guaranteed by design, characterization, and/or simulation only. Not production tested.
V
TL
, V
TH
, and V
HY
are a function of the internal supply voltage, which is a function of V
PUP
, R
PUP
, 1-Wire timing, and
capacitive loading on IO. Lower V
PUP
, higher R
PUP
, shorter t
REC
, and heavier capacitive loading all lead to lower values
of V
TL
, V
TH
, and V
HY
.
Voltage below which, during a falling edge on IO, a logic 0 is detected.
The voltage on IO must be less than or equal to V
ILMAX
at all times the master is driving IO to a logic 0 level.
Voltage above which, during a rising edge on IO, a logic 1 is detected.
After V
TH
is crossed during a rising edge on IO, the voltage on IO must drop by at least V
HY
to be detected as logic 0.
The I-V characteristic is linear for voltages less than 1V.
Applies to a single device attached to a 1-Wire line.
The earliest recognition of a negative edge is possible at t
REH
after V
TH
has been reached on the preceding rising edge.
Defines maximum possible bit rate. Equal to t
W0LMIN
+ t
RECMIN
.
Interval after t
RSTL
during which a bus master can read a logic 0 on IO if there is a DS2431 present. The power-up pres-
ence detect pulse could be outside this interval, but will be complete within 2ms after power-up.
Numbers in
bold
are
not
in compliance with legacy 1-Wire product standards. See the
Comparison Table.
ε in Figure 11 represents the time required for the pullup circuitry to pull the voltage on IO up from V
IL
to V
TH
. The actual
maximum duration for the master to pull the line low is t
W1LMAX
+ t
F - ε
and t
W0LMAX
+ t
F - ε
, respectively.
δ in Figure 11 represents the time required for the pullup circuitry to pull the voltage on IO up from V
IL
to the input-high
threshold of the bus master. The actual maximum duration for the master to pull the line low is t
RLMAX
+ t
F
.
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Maxim Integrated
│
3
DS2431
1024-Bit, 1-Wire EEPROM
Note 19:
Current drawn from IO during the EEPROM programming interval. The pullup circuit on IO during the programming interval
should be such that the voltage at IO is greater than or equal to V
PUPMIN
. If V
PUP
in the system is close to V
PUPMIN
, a
low-impedance bypass of R
PUP
, which can be activated during programming, may need to be added.
Note 20:
Interval begins t
REHMAX
after the trailing rising edge on IO for the last time slot of the E/S byte for a valid Copy
Scratchpad sequence. Interval ends once the device’s self-timed EEPROM programming cycle is complete and the current
drawn by the device has returned from I
PROG
to I
L
.
Note 21:
t
PROG
for units branded version “A1” is 12.5ms. t
PROG
for units branded version “A2” and later is 10ms.
Note 22:
Write-cycle endurance is degraded as T
A
increases.
Note 23:
Not 100% production tested; guaranteed by reliability monitor sampling.
Note 24:
Data retention is degraded as T
A
increases.
Note 25:
Guaranteed by 100% production test at elevated temperature for a shorter time; equivalence of this production test to the
data sheet limit at operating temperature range is established by reliability testing.
Note 26:
EEPROM writes can become nonfunctional after the data-retention time is exceeded. Long-term storage at elevated tem-
peratures is not recommended; the device can lose its write capability after 10 years at +125°C or 40 years at +85°C.
Comparison Table
PARAMETER
LEGACY VALUES
OVERDRIVE SPEED
(µs)
MIN
7
48
2
8
6
MAX
(undefined)
80
6
24
16
DS2431 VALUES
STANDARD SPEED (µs)
MIN
65*
480
15
60
60
MAX
(undefined)
640
60
240
120
OVERDRIVE SPEED
(µs)
MIN
8*
48
2
8
6
MAX
(undefined)
80
6
24
15.5
STANDARD SPEED (µs)
MIN
MAX
(undefined)
(undefined)
60
240
120
t
SLOT
(including t
REC
)
t
RSTL
t
PDH
t
PDL
t
W0L
61
480
15
60
60
*Intentional
change; longer recovery time requirement due to modified 1-Wire front-end.
Note:
Numbers in
bold
are
not
in compliance with legacy 1-Wire product standards.
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│
4
DS2431
1024-Bit, 1-Wire EEPROM
Pin Description
PIN
TSOC
3, 4, 5, 6
2
1
TO-92
3
2
1
TDFN-EP
1, 4, 5, 6
2
3
SFN
—
1
2
UCSPR
A2, A3, C2,
C3
C1
A1
NAME
N.C.
IO
GND
FUNCTION
Not Connected
1-Wire Bus Interface. Open-drain signal
that requires an external pullup resistor.
Ground Reference
Exposed Pad (TDFN only). Solder
evenly to the board’s ground plane for
proper operation. Refer to Application
Note 3273:
Exposed Pads: A Brief
Introduction
for additional information.
—
—
—
—
—
EP
Detailed Description
The DS2431 combines 1024 bits of EEPROM, an 8-byte
register/control page with up to 7 user read/write bytes,
and a fully featured 1-Wire interface in a single chip. Each
DS2431 has its own 64-bit ROM registration number that
is factory lasered into the chip to provide a guaranteed
unique identity for absolute traceability. Data is transferred
serially through the 1-Wire protocol, which requires only a
single data lead and a ground return. The DS2431 has an
additional memory area called the scratchpad that acts as
a buffer when writing to the main memory or the register
page. Data is first written to the scratchpad from which it
can be read back. After the data has been verified, a Copy
Scratchpad command transfers the data to its final memory
location. The DS2431 applications include accessory/PCB
identification, medical sensor calibration data storage,
analog sensor calibration including IEEE P1451.4 smart
sensors, ink and toner print cartridge identification, and
after-market management of consumables.
PARASITE POWER
IO
1-Wire
FUNCTION CONTROL
64-BIT
LASERED ROM
DS2431
MEMORY
FUNCTION
CONTROL UNIT
CRC-16
GENERATOR
DATA MEMORY
4 PAGES OF
256 BITS EACH
REGISTER PAGE
64 BITS
64-BIT
SCRATCHPAD
Overview
The block diagram in Figure 1 shows the relationships
between the major control and memory sections of the
DS2431. The DS2431 has four main data components:
64-bit lasered ROM, 64-bit scratchpad, four 32-byte
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