W25Q80DV/DL
2.5V AND 3V 8M-BIT
SERIAL FLASH MEMORY WITH
DUAL AND QUAD SPI
- 1 -
Publication Release Date:October 02, 2015
Preli mry-Revision
H
W25Q80DV/DL
Table of Contents
1.
2.
3.
GENERAL DESCRIPTION ......................................................................................................... 5
FEATURES ................................................................................................................................. 5
PACKAGE TYPES AND PIN CONFIGURATIONS..................................................................... 6
3.1
Pin Configuration SOIC 150-MIL/208-mil AND VSOP 150-mil: ...................................... 6
3.2
Pad Configuration WSON 6x5-mm, USON 2X3-mm...................................................... 6
3.3
Pin Configuration PDIP 300-mil ...................................................................................... 7
3.4
Pin Description SOIC/VSOP , WSON/USON & PDIP 300-mil ....................................... 7
3.5
Ball Configuration WLCSP .............................................................................................. 8
3.6
Ball Description WLCSP ................................................................................................. 8
PIN DESCRIPTIONS .................................................................................................................. 9
4.1
Chip Select (/CS) ............................................................................................................ 9
4.2
Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3)............................... 9
4.3
Write Protect (/WP) ......................................................................................................... 9
4.4
HOLD (/HOLD)................................................................................................................ 9
4.5
Serial Clock (CLK) .......................................................................................................... 9
BLOCK DIAGRAM .................................................................................................................... 10
FUNCTIONAL DESCRIPTION.................................................................................................. 11
6.1
SPI OPERATIONS ....................................................................................................... 11
6.1.1
6.1.2
6.1.3
6.1.4
Standard SPI Instructions ............................................................................................... 11
Dual SPI Instructions ...................................................................................................... 11
Quad SPI Instructions ..................................................................................................... 11
Hold Function .................................................................................................................. 11
Write Protect Features .................................................................................................... 12
4.
5.
6.
6.2
7.
WRITE PROTECTION .................................................................................................. 12
6.2.1
CONTROL AND STATUS REGISTERS ................................................................................... 13
7.1
STATUS REGISTER .................................................................................................... 13
7.1.1
7.1.2
7.1.3
7.1.4
7.1.5
7.1.6
7.1.7
7.1.8
7.1.9
7.1.10
7.1.11
7.1.12
BUSY .............................................................................................................................. 13
Write Enable Latch (WEL) .............................................................................................. 13
Block Protect Bits (BP2, BP1, BP0) ................................................................................ 13
Top/Bottom Block Protect (TB) ....................................................................................... 13
Sector/Block Protect (SEC) ............................................................................................. 13
Complement Protect (CMP) ............................................................................................ 14
Status Register Protect (SRP1, SRP0) ........................................................................... 14
Erase/Program Suspend Status (SUS) ........................................................................... 14
Security Register Lock Bits (LB3, LB2, LB1) ................................................................... 14
Quad Enable (QE) ........................................................................................................ 15
Status Register Memory Protection (CMP = 0) ............................................................. 16
Status Register Memory Protection (CMP = 1) ............................................................. 17
8.
INSTRUCTIONS ....................................................................................................................... 18
8.1
Manufacturer and Device Identification ........................................................................ 18
8.2
Instruction Set Table 1 (Standard SPI Instructions)
(1)
.................................................. 19
8.3
Instruction Set Table 2 (Dual SPI Instructions) ............................................................. 20
8.4
Instruction Set Table 3 (Quad SPI Instructions) ........................................................... 20
8.5
Instruction Descriptions ................................................................................................ 22
Publication Release Date:October 02, 2015
Preli mry-Revision
H
- 2 -
W25Q80DV/DL
8.5.1
8.5.2
8.5.3
8.5.4
8.5.5
8.5.6
8.5.7
8.5.8
8.5.9
8.5.10
8.5.11
8.5.12
8.5.13
8.5.14
8.5.15
8.5.16
8.5.17
8.5.18
8.5.19
8.5.20
8.5.21
8.5.22
8.5.23
8.5.24
8.5.25
8.5.26
8.5.27
8.5.28
8.5.29
8.5.30
8.5.31
8.5.32
Write Enable (06h) .......................................................................................................... 22
Write Enable for Volatile Status Register (50h) ............................................................... 22
Write Disable (04h) ......................................................................................................... 23
Read Status Register-1 (05h) and Read Status Register-2 (35h) ................................... 24
Write Status Register (01h)............................................................................................. 25
Read Data (03h) ............................................................................................................. 26
Fast Read (0Bh).............................................................................................................. 27
Fast Read Dual Output (3Bh) ......................................................................................... 28
Fast Read Quad Output (6Bh) ........................................................................................ 29
Fast Read Dual I/O (BBh) ............................................................................................. 30
Fast Read Quad I/O (EBh)............................................................................................ 31
Set Burst with Wrap (77h) ............................................................................................. 33
Page Program (02h) ..................................................................................................... 34
Quad Input Page Program (32h) ................................................................................... 35
Sector Erase (20h) ........................................................................................................ 36
32KB Block Erase (52h)................................................................................................ 37
64KB Block Erase (D8h) ............................................................................................... 38
Chip Erase (C7h / 60h) ................................................................................................. 39
Erase / Program Suspend (75h) ................................................................................... 40
Erase / Program Resume (7Ah) .................................................................................... 41
Power-down (B9h) ........................................................................................................ 42
Release Power-down / Device ID (ABh) ....................................................................... 43
Read Manufacturer / Device ID (90h) ........................................................................... 45
Read Manufacturer / Device ID Dual I/O (92h) ............................................................. 46
Read Manufacturer / Device ID Quad I/O (94h) ............................................................ 47
Read Unique ID Number (4Bh) ..................................................................................... 48
Read JEDEC ID (9Fh) .................................................................................................. 49
Read SFDP Register (5Ah)........................................................................................... 50
Erase Security Registers (44h) ..................................................................................... 51
Program Security Registers (42h) ................................................................................. 52
Read Security Registers (48h) ...................................................................................... 53
Enable Reset (66h) and Reset (99h) ............................................................................ 54
9.
10.
ELECTRICAL CHARACTERISTICS ......................................................................................... 55
9.1
Absolute Maximum Ratings
(1)(2)
.................................................................................... 55
9.2
Operating Ranges ......................................................................................................... 55
9.3
Power-up Timing and Write Inhibit Threshold
(1)
............................................................ 56
9.4
DC Electrical Characteristics ........................................................................................ 57
9.5
AC Measurement Conditions ........................................................................................ 58
9.6
AC Electrical Characteristics ........................................................................................ 59
9.7
Serial Output Timing ..................................................................................................... 61
9.8
Serial Input Timing ........................................................................................................ 61
9.9
Hold Timing ................................................................................................................... 61
9.10 /WP Timing ................................................................................................................... 61
PACKAGE SPECIFICATION .................................................................................................... 62
10.1 8-Pin SOIC8 150-mil (Package Code SN) .................................................................... 62
10.2 8-Pin SOIC8 208-mil (Package Code SS) .................................................................... 63
10.3 8-Pin VSOP8 150-mil (Package Code SV) ................................................................... 64
Publication Release Date:October 02, 2015
Preli mry-Revision
H
- 3 -
W25Q80DV/DL
10.4 8-Pad WSON 6x5mm (Package Code ZP) .................................................................. 65
10.5 8-Pad USON 2x3x0.6-mm^³ (Package Code UX, W25Q80DV/DL:UXIE).................... 66
10.6 8-Pin PDIP 300-mil (Package Code DA) ...................................................................... 67
10.7 8-Ball WLCSP (Package Code BY) .............................................................................. 68
10.8 Ordering Information ..................................................................................................... 69
10.9 Valid Part Numbers and Top Side Marking .................................................................. 70
REVISION HISTORY ................................................................................................................ 72
11.
- 4 -
Publication Release Date:October 02, 2015
Preli mry-Revision
H
W25Q80DV/DL
1.
GENERAL DESCRIPTION
The W25Q80DV/DL (8M-bit) Serial Flash memory provides a storage solution for systems with limited
space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial
Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad
SPI (XIP) and storing voice, text and data. The W25Q80DV operates on a single 2.7V to 3.6V and the
W25Q80DL operateds on a single 2.3V to 3.6V power supply with current consumption as low as 1µA
for power-down.
The W25Q80DV/DL array is organized into 4,096 programmable pages of 256-bytes each. Up to 256
bytes can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups
of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The
W25Q80DV/DL has 256 erasable sectors and 16 erasable blocks respectively. The small 4KB sectors
allow for greater flexibility in applications that require data and parameter storage. (See figure 2.)
The W25Q80DV supports the standard Serial Peripheral Interface (SPI), and a high performance
Dual/Quad output as well as Dual/Quad I/O SPI: Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1
(DO), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 104MHz are supported allowing
equivalent clock rates of 208MHz (104MHz x 2) for Dual I/O and 416MHz (104MHz x 4) for Quad I/O
when using the Fast Read Dual/Quad I/O instructions. These transfer rates can outperform standard
Asynchronous 8 and 16-bit Parallel Flash memories. A Hold pin, Write Protect pin and programmable
write protection, with top, bottom or complement array control, provide further control flexibility.
Additionally, the device supports JEDEC standard manufacturer and device identification with a 64-bit
Unique Serial Number.
2.
FEATURES
– More than 20-year data retention
Low Power, Wide Temperature Range
– W25Q80DV: Single 2.7 to 3.6V supply
– W25Q80DL: Single 2.3 to 3.6V supply
– <1µA Power-down(typ.)
Advanced Security & Identification Features
– Software and Hardware Write-Protect
– Top/Bottom, 4KB complement array protection
– Power Supply Lock-Down and OTP protection
– 64-Bit Unique ID for each device
– Discoverable Parameters (SFDP) Register
– 3X256-Byte Security Registers with OTP locks
– Volatile & Non-volatile Status Register Bits
Space Efficient Packaging
(1)
:
– 8-pin SOIC 150-mil/208mil, VSOP 150-mil
– 8-pad WSON 6x5-mm, USON 2x3-mm
– 8-pin PDIP 300-mil
– 8-ball WLCSP
– Contact Winbond for KGD and other options
Note 1. Some package types are special orders,
please contact Winbond for ordering
information.
Family of SpiFlash Memories
– W25Q80DV/DL: 8M-bit/1M-byte (1,048,576)
– 256-byte per programmable page
– Standard SPI: CLK,/CS,DI,DO,/WP,/Hold
– Dual SPI: CLK, /CS, IO
0
, IO
1
, /WP, /Hold
– Quad SPI: CLK, /CS, IO
0
, IO
1
, IO
2
, IO
3
– Uniform 4KB Sectors, 32KB & 64KB Blocks
Highest Performance Serial Flash
– W25Q80DV
104MHz Dual/Quad SPI clocks
208/416MHz equivalent Dual/Quad SPI
50MB/S continuous data transfer rate
– W25Q80DL
80MHz Dual/Quad SPI clocks
160/320MHz equivalent Dual/Quad SPI
40MB/S continuous data transfer rate
Software and Hardware Write Protection
– Write-Protect all or portion of memory
– Enable/Disable protection with /WP pin
– Top or bottom array protection
Flexible Architecture with 4KB sectors
– Uniform Sector/Block Erase (4/32/64-kbytes)
– Erase/Program Suspend & Resume
– More than 100,000 erase/write cycles
- 5 -
Publication Release Date:October 02, 2015
Preli mry-Revision
H
京公网安备 11010802033920号
EEWORLD
