W25Q16JV-DTR
3V 16M-BIT
SERIAL FLASH MEMORY WITH
DUAL/QUAD SPI, QPI & DTR
Publication Release Date: January 12, 2018
Revision E
W25Q16JV-DTR
Table of Contents
1.
2.
3.
GENERAL DESCRIPTIONS ............................................................................................................. 4
FEATURES ....................................................................................................................................... 4
PACKAGE TYPES AND PIN CONFIGURATIONS .......................................................................... 5
3.1
Pin Configuration SOIC 150/208-mil .................................................................................... 5
3.2
Pad Configuration WSON 6x5-mm, USON 2x3-mm/4x3-mm .............................................. 5
3.3
Pin Description SOIC 150/208-mil, WSON 6x5-mm, USON 2x3-mm/4x3-mm.................... 5
PIN DESCRIPTIONS ........................................................................................................................ 7
4.1
Chip Select (/CS) .................................................................................................................. 7
4.2
Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) .................................... 7
4.3
Write Protect (/WP)............................................................................................................... 7
4.4
HOLD (/HOLD) ..................................................................................................................... 7
4.5
Serial Clock (CLK) ................................................................................................................ 7
4.6
Reset (/RESET) .................................................................................................................... 7
BLOCK DIAGRAM ............................................................................................................................ 8
FUNCTIONAL DESCRIPTIONS ....................................................................................................... 9
6.1
SPI / QPI Operations ............................................................................................................ 9
Standard SPI Instructions ....................................................................................................... 9
Dual SPI Instructions .............................................................................................................. 9
Quad SPI Instructions ........................................................................................................... 10
QPI Instructions .................................................................................................................... 10
SPI / QPI DTR Read Instructions .......................................................................................... 10
Hold Function........................................................................................................................ 10
Software Reset & Hardware /RESET pin .............................................................................. 11
4.
5.
6.
6.2
7.
Write Protection .................................................................................................................. 12
Write Protect Features .......................................................................................................... 12
STATUS AND CONFIGURATION REGISTERS ............................................................................ 13
7.1
Status Registers ................................................................................................................. 13
Erase/Write In Progress (BUSY)
–
Status Only
................................................................. 13
Write Enable Latch (WEL)
–
Status Only
........................................................................... 13
Block Protect Bits (BP2, BP1, BP0)
–
Volatile/Non-Volatile Writable
................................. 13
Top/Bottom Block Protect (TB)
–
Volatile/Non-Volatile Writable
........................................ 14
Sector/Block Protect Bit (SEC)
–
Volatile/Non-Volatile Writable
........................................ 14
Complement Protect (CMP)
–
Volatile/Non-Volatile Writable
............................................ 14
Status Register Protect (SRP, SRL) ..................................................................................... 15
Erase/Program Suspend Status (SUS)
–
Status Only
....................................................... 16
Security Register Lock Bits (LB3, LB2, LB1)
–
Volatile/Non-Volatile OTP Writable
......... 16
Quad Enable (QE)
–
Volatile/Non-Volatile Writable
......................................................... 16
Write Protect Selection (WPS)
–
Volatile/Non-Volatile Writable
...................................... 17
Output Driver Strength (DRV1, DRV0)
–
Volatile/Non-Volatile Writable
.......................... 18
/HOLD or /RESET Pin Function (HOLD/RST)
–
Volatile/Non-Volatile Writable
............... 18
Reserved Bits
–
Non Functional
...................................................................................... 18
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W25Q16JV-DTR
W25Q16JV Status Register Memory Protection (WPS = 0, CMP = 0) ............................... 19
W25Q16JV Status Register Memory Protection (WPS = 0, CMP = 1) ............................... 20
W25Q16JV Individual Block Memory Protection (WPS=1) ................................................. 21
8.
INSTRUCTIONS ............................................................................................................................. 22
8.1
Device ID and Instruction Set Tables ................................................................................. 22
Manufacturer and Device Identification ................................................................................. 22
Instruction Set Table 1 (Standard SPI Instructions)
(1)
.......................................................... 23
Instruction Set Table 2 (Dual/Quad SPI Instructions)
(1)
......................................................... 24
Instruction Set Table 3 (QPI Instructions)
(11)
......................................................................... 25
Instruction Set Table 4 (DTR with SPI Instructions) .............................................................. 26
Instruction Set Table 5 (DTR with QPI Instructions) ............................................................. 26
8.2
Instruction Descriptions ...................................................................................................... 28
Write Enable (06h) ................................................................................................................ 28
Write Enable for Volatile Status Register (50h)..................................................................... 28
Write Disable (04h) ............................................................................................................... 29
Read Status Register-1 (05h), Status Register-2 (35h) & Status Register-3 (15h) ............... 29
Write Status Register-1 (01h), Status Register-2 (31h) & Status Register-3 (11h) ............... 30
Read Data (03h) ................................................................................................................... 33
Fast Read (0Bh) ................................................................................................................... 34
Fast Read (0Bh) in QPI Mode ............................................................................................... 35
DTR Fast Read (0Dh) ........................................................................................................... 36
DTR Fast Read (0Dh) in QPI Mode .................................................................................................. 37
Fast Read Dual Output (3Bh) ............................................................................................. 38
Fast Read Quad Output (6Bh) ............................................................................................ 39
Fast Read Dual I/O (BBh) ................................................................................................... 40
DTR Fast Read Dual I/O (BDh) .......................................................................................... 42
Fast Read Quad I/O (EBh).................................................................................................. 44
DTR Fast Read Quad I/O (EDh) ......................................................................................... 46
Set Burst with Wrap (77h) ................................................................................................... 50
Page Program (02h) ........................................................................................................... 51
Quad Input Page Program (32h)......................................................................................... 53
Sector Erase (20h) .............................................................................................................. 54
32KB Block Erase (52h)...................................................................................................... 55
64KB Block Erase (D8h) ..................................................................................................... 56
Chip Erase (C7h / 60h) ....................................................................................................... 57
Erase / Program Suspend (75h) ......................................................................................... 58
Erase / Program Resume (7Ah) .......................................................................................... 60
Power-down (B9h) .............................................................................................................. 61
Release Power-down / Device ID (ABh) ............................................................................. 62
Read Manufacturer / Device ID (90h) ................................................................................. 64
Read Manufacturer / Device ID Dual I/O (92h) ................................................................... 65
Read Manufacturer / Device ID Quad I/O (94h) .................................................................. 66
Read Unique ID Number (4Bh) ........................................................................................... 67
Read JEDEC ID (9Fh) ........................................................................................................ 68
Read SFDP Register (5Ah)................................................................................................. 69
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Publication Release Date: January 12, 2018
Revision E
W25Q16JV-DTR
Erase Security Registers (44h) ........................................................................................... 70
Program Security Registers (42h) ....................................................................................... 71
Read Security Registers (48h) ............................................................................................ 72
Set Read Parameters (C0h) ............................................................................................... 73
Burst Read with Wrap (0Ch) ............................................................................................... 74
DTR Burst Read with Wrap (0Eh) ....................................................................................... 75
Enter QPI Mode (38h) ......................................................................................................... 76
Exit QPI Mode (FFh) ........................................................................................................... 77
Individual Block/Sector Lock (36h) ...................................................................................... 78
Individual Block/Sector Unlock (39h) .................................................................................. 79
Read Block/Sector Lock (3Dh)............................................................................................ 80
Global Block/Sector Lock (7Eh) .......................................................................................... 81
Global Block/Sector Unlock (98h) ....................................................................................... 81
Enable Reset (66h) and Reset Device (99h) ...................................................................... 82
9.
ELECTRICAL CHARACTERISTICS............................................................................................... 83
9.1
Absolute Maximum Ratings (1) .......................................................................................... 83
9.2
9.3
Operating Ranges .............................................................................................................. 83
Power-Up Power-Down Timing and Requirements ........................................................... 84
DC Electrical Characteristics(1)- ........................................................................................ 85
10.
9.4
9.5
AC Measurement Conditions ............................................................................................. 86
9.6
AC Electrical Characteristics
(6)
........................................................................................... 87
9.7
Serial Output Timing ........................................................................................................... 89
9.8
Serial Input Timing.............................................................................................................. 89
9.9
/HOLD Timing ..................................................................................................................... 89
9.10 WP Timing .......................................................................................................................... 89
PACKAGE SPECIFICATIONS ....................................................................................................... 90
10.1 8-Pin SOIC 150-mil (Package Code SN) ........................................................................... 90
10.3 8-Pin SOIC 208-mil (Package Code SS) ............................................................................ 91
10.4 8-Pad WSON 6x5-mm (Package Code ZP) ....................................................................... 92
10.1 8-Pad USON 2x3x0.6-mm^³ (Package Code UX) ............................................................. 93
10.2 8-Pad USON 4x3-mm (Package Code UU) ....................................................................... 94
10.3 Ordering Information........................................................................................................... 96
10.4 Valid Part Numbers and Top Side Marking ........................................................................ 97
REVISION HISTORY ...................................................................................................................... 98
11.
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W25Q16JV-DTR
1. GENERAL DESCRIPTIONS
The W25Q16JV (16M-bit) Serial Flash memory provides a storage solution for systems with limited space,
pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash devices.
They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing
voice, text and data. The device operates on a single 2.7V to 3.6V power supply with current consumption
as low as 1µA for power-down.
The W25Q16JV array is organized into 8,192 programmable pages of 256-bytes each. Up to 256 bytes can
be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB
block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q16JV has 512
erasable sectors and 32 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in
applications that require data and parameter storage. (See figure 2.)
The W25Q16JV support the standard Serial Peripheral Interface (SPI), Dual/Quad I/O SPI Quad Peripheral
Interface (QPI) as well as Double Transfer Rate(DTR) : Serial Clock, Chip Select, Serial Data I/O0 (DI),
I/O1 (DO), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 133MHz are supported allowing
equivalent clock rates of 266MHz (133MHz x 2) for Dual I/O and 532MHz (133MHz x 4) for Quad I/O when
using the Fast Read Dual/Quad I/O and QPI instructions. These 3transfer rates can outperform standard
Asynchronous 8 and 16-bit Parallel Flash memories. The Continuous Read Mode allows for efficient
memory access with as few as 8-clocks of instruction-overhead to read a 24-bit address, allowing true XIP
(execute in place) operation.
A Hold pin, Write Protect pin and programmable write protection, with top or bottom array control, provide
further control flexibility. Additionally, the device supports JEDEC standard manufacturer and device ID and
SFDP Register, a 64-bit Unique Serial Number and three 256-bytes Security Registers.
2. FEATURES
New Family of SpiFlash Memories
– W25Q16JV: 16M-bit / 2M-byte (2,097,152)
– Standard SPI: CLK, /CS, DI, DO, /WP, /Hold
– Dual SPI: CLK, /CS, IO
0
, IO
1
, /WP, /Hold
– Quad SPI: CLK, /CS, IO
0
, IO
1
, IO
2
, IO
3
– QPI: CLK, /CS, IO
0
, IO
1
, IO
2
, IO
3
– SPI/QPI DTR(Double Transfer Rate) Read
– Software & Hardware Reset
Highest Performance Serial Flash
– 133MHz Single, Dual/Quad SPI clocks
– 266/532MHz equivalent Dual/Quad SPI
– 66MB/S continuous data transfer rate
– Min. 100K Program-Erase cycles per sector
– More than 20-year data retention
Efficient “Continuous Read” and QPI Mode
– Continuous Read with 8/16/32/64-Byte Wrap
– As few as 8 clocks to address memory
– Quad Peripheral Interface (QPI) reduces
instruction overhead
– Allows true XIP (execute in place) operation
– Outperforms X16 Parallel Flash
Low Power, Wide Temperature Range
– Single 2.7V to 3.6V supply
– -40°C to +85°C operating range
– -40°C to +105°C operating range
– <1µA Power-down (typ.)
Flexible Architecture with 4KB sectors
– Uniform Sector/Block Erase (4K/32K/64K-Byte)
– Program 1 to 256 byte per programmable page
– Erase/Program Suspend & Resume
Advanced Security Features
– Software and Hardware Write-Protect
– Power Supply Lock-Down and Special OTP protection
– Top/Bottom, Complement array protection
– Individual Block/Sector array protection
– 64-Bit Unique ID for each device
– Discoverable Parameters (SFDP) Register
– 3X256-Bytes Security Registers with OTP locks
– Volatile & Non-volatile Status Register Bits
Space Efficient Packaging
– 8-pin SOIC 150-mil / 208-mil
– 8-pad USON 2X3mm/4x3-mm
– 8-pad WSON 6x5-mm
– 24-ball TFBGA 8x6-mm (5x5 ball array)
– Contact Winbond for KGD and other options
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Publication Release Date: January 12, 2018
Revision E
MCU
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