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Datasheet> All Categories > semiconductor> Programmable logic devices> QL4016-2CG256M
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QL4016-2CG256M

Description
FPGA, 320 CLBS, 16000 GATES, CPGA84
Categorysemiconductor    Programmable logic devices   
File Size394KB，22 Pages
ManufacturerETC
Download Datasheet Parametric View All

QL4016-2CG256M Overview

FPGA, 320 CLBS, 16000 GATES, CPGA84

QL4016-2CG256M Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals84
Maximum operating temperature125 Cel
Minimum operating temperature-55 Cel
Maximum supply/operating voltage3.6 V
Minimum supply/operating voltage3 V
Rated supply voltage3.3 V
Processing package description0.100 INCH PITCH, CERAMIC, PGA-84
stateACTIVE
CraftsmanshipCMOS
packaging shapeSQUARE
Package SizeGRID ARRAY, HEAT SINK/SLUG
Terminal formPIN/PEG
Terminal spacing2.54 mm
Terminal locationPERPENDICULAR
Packaging MaterialsCERAMIC, METAL-SEALED COFIRED
Temperature levelMILITARY
organize320 CLBS, 16000 GATES
Number of configurable logic modules320
Programmable logic typeFIELD PROGRAMMABLE GATE ARRAY
Number of equivalent gate circuits16000
The maximum delay of a CLB module5.25 ns

QL4016-2CG256M Preview

Military QuickRAM
90,000 Usable PLD Gate QuickRAM Combining Performance, Density
and
Embedded RAM
Military QuickRAM
D
EVICE
H
IGHLIGHTS
Device Highlights
Features
F
EATURES
Total of 316 I/O pins
s
High Performance and High Density
s
s
Up to 90,000 Usable PLD Gates with 316 I/Os
300 MHz 16-bit Counters, 400 MHz Datapaths, 160+
MHz FIFOs
0.35um four-layer metal non-volatile CMOS process for
smallest die sizes
308 bi-directional input/output pins, PCI-compliant for
5.0 volt and 3.3 volt buses for -1/-2/-3/-4 speed grades
8 high-drive input/distributed network pins
s
s
Eight Low-Skew Distributed Networks
s
High Speed Embedded SRAM
s
Up to 22 dual-port RAM modules, organized in user-
configurable 1,152-bit blocks
5ns access times, each port independently accessible
Fast and efficient for FIFO, RAM, and ROM functions
Two array clock/control networks available to the logic
cell flip-flop clock, set and reset inputs - each driven by
an input-only pin
Six global clock/control networks available to the logic
cell F1, clock, set and reset inputs and the input and I/O
register clock, reset and enable inputs as well as the
output enable control - each driven by an input-only or
I/O pin, or any logic cell output or I/O cell feedback
s
s
s
Easy to Use / Fast Development Cycles
s
100% routable with 100% utilization and complete
pin-out stability
Variable-grain logic cells provide high performance and
100% utilization
Comprehensive design tools include high quality Verilog/
VHDL synthesis
High Performance
s
s
s
s
Input + logic cell + output total delays under 6 ns
Data path speeds exceeding 400 MHz
Counter speeds over 300 MHz
FIFO speeds over 160+ MHz
s
s
Advanced I/O Capabilities
s
s
Military Reliability
s
s
Interfaces with both 3.3 volt and 5.0 volt devices
PCI compliant with 3.3V and 5.0V buses for -1/-2
speed grades
Full JTAG boundary scan
Registered I/O cells with individually controlled clocks
and output enables
Device
QL4016
11,520 RAM Bits
Mil-STD-883 and Miil Temp Ceramic
Mil Temp Plastic - Guaranteed -55
°
C to 125
°
C
s
s
Usable
Gates
8,000-
16,000
Package
Max
I/O
70
70
82
118
174
174
174
174
207
223
316
Qualification
Level
M, /883
M
M, /883
M, /883
M
M, /883
M
M, /883
M
M, /883
M
Supply
Voltage
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3V
3.3V
3.3V
3.3V
3.3V
84CPGA
84PLCC
100CQFP
144CPGA
QL4036
16,000-
208PQFP
16,128 RAM bits
25,000
208CQFP
208PQFP
208CQFP
QL4090
36,000-
240PQFP
25,344 RAM bits
60,000
256CPGA
456PBGA
M = Military Temperature (-15 to +125 degrees C)
/888 = MIL STD 883
TABLE 1: Selector Table
Rev A
8-
37
Military QuickRAM
P
RODUCT
S
UMMARY
Product Summary
The QuickRAM family of ESPs (Embedded Standard
Products) offers FPGA logic in combination with
Dual-Port SRAM modules. QuickRAM is a 90,000
usable PLD gate ESPs. QuickRAM ESPs are fabri-
cated on a 0.35mm four-layer metal process using
QuickLogic’s patented ViaLink technology to provide
a unique combination of high performance, high
density, low cost, and extreme ease-of-use.
QuickRAM contains up to 1,584 logic cells and 22
dual port RAM modules. Each RAM module has
1,152 RAM bits, for a total of up to 25,344 bits.
RAM Modules are Dual Port (one read port, one
write port) and can be configured into one of four
modes: 64 (deep) x18 (wide), 128x9, 256x4, or
512x2. With a maximum of 316 I/Os, and is avail-
Pinout Diagram 84-Pin PLCC
able in plastic 84-PLCC, 208-PQFP, 240-PQFP and
456-PBGA packages and in ceramic 100, 208-
CQFP and 84, 144, 256-CPGA.
Software support for the complete QuickRAM family
is available through two basic packages. The turnkey
QuickWorks
package provides the most complete
ESP software solution from design entry to logic syn-
thesis, to place and route, to simulation. The Quick-
Tools
TM
for Workstations package provides a solution
for designers who use Cadence, Exemplar, Mentor,
Synopsys, Synplicity, Viewlogic, Veribest, or other
third-party tools for design entry, synthesis, or simu-
lation.
P
INOUT
D
IAGRAM
84-P
IN
PLCC
QuickRAM
QL4016-1PL84M
TABLE 2: 84-pin PLCC
8-38
38
Rev A
Preliminary
Military QuickRAM
P
INOUT
D
IAGRAM
100-P
IN
CQFP
Pinout Diagram 100-Pin CQFP
Pin #1
Pin #76
QuickRAM
QL4016-1CF100M
Pin #26
Pin #51
100 CQFP Pinout Table
100
TQFP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Function
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
GCLK / I
ACLK / I
VCC
GCLK / I
GCLK / I
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
100
100
100
Function
Function
Function
TQFP
TQFP
TQFP
26
TDI
51
I/O
76
TCK
27
I/O
52
I/O
77
STM
28
I/O
53
I/O
78
I/O
29
I/O
54
I/O
79
I/O
30
I/O
55
I/O
80
I/O
31
I/O
56
I/O
81
I/O
32
I/O
57
I/O
82
I/O
33
I/O
58
I/O
83
I/O
34
I/O
59
GND
84
I/O
35
GND
60
I/O
85
GND
36
I/O
61
GCLK / I
86
I/O
37
I/O
62
ACLK / I
87
I/O
38
GND
63
VCC
88
GND
39
I/O
64
GCLK / I
89
I/O
40
I/O
65
GCLK / I
90
I/O
41
I/O
66
VCC
91
I/O
42
VCCIO
67
I/O
92
VCCIO
43
I/O
68
I/O
93
I/O
44
I/O
69
I/O
94
I/O
45
I/O
70
I/O
95
I/O
46
I/O
71
I/O
96
I/O
47
I/O
72
I/O
97
I/O
48
I/O
73
I/O
98
I/O
49
TRSTB
74
I/O
99
I/O
50
TMS
75
I/O
100
TDO
Rev A
8-39
Military QuickRAM
P
INOUT
D
IAGRAMS
208-Pin PQFP/CQFP
Pin #1
Pin #157
QuickRAM
QL4090-1PQ208M
Pin #53
Pin #105
240-Pin PQFP
Pin #157
Pin #1
QuickRAM
QL4090-1PQ240M
Pin #53
Pin #105
8-40
40
Rev A
Preliminary
Military QuickRAM
P
INOUT
T
ABLE
PQFP/CQFP 240/208 Pinout Table
240
208
PQFP PQFP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
208
1
2
3
4
5
NC
6
7
8
9
10
11
12
13
14
NC
15
16
17
18
19
20
NC
21
22
23
24
25
26
27
28
29
30
31
32
NC
33
NC
34
35
36
NC
37
38
39
NC
40
41
42
Function
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VCC
I/O
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
GCLK / I
ACLK / I
VCC
GCLK / I
GCLK / I
VCC
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VCC
I/O
240
208
PQFP PQFP
51
52
53
54
55
56
57
58
59
60
NC
NC
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
NC
84
85
86
87
88
89
90
91
92
93
94
95
96
97
43
44
45
46
47
48
NC
49
50
51
52
53
54
NC
NC
55
56
NC
57
58
59
60
61
62
63
64
NC
65
66
67
NC
68
69
70
NC
71
NC
72
73
74
NC
75
76
77
78
79
80
81
82
83
Function
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
TDI
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
VCC
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O
VCCIO
240
208
PQFP PQFP
98
99
100
101
102
103
104
105
106
107
108
109
110
NC
111
NC
NC
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
84
85
86
87
88
89
90
91
92
NC
93
94
95
96
97
98
99
100
NC
101
NC
102
NC
NC
103
104
105
NC
106
107
108
109
NC
110
111
112
113
114
115
116
117
NC
118
119
120
121
NC
122
123
124
Function
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
TRSTB
TMS
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VCC
I/O
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
240
208
Function
PQFP PQFP
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
NC
181
182
183
184
185
186
187
188
189
190
191
192
193
125
126
127
128
NC
129
130
131
132
133
134
135
136
NC
137
NC
138
139
140
141
142
NC
143
144
145
NC
146
147
148
149
150
151
152
153
154
155
156
157
158
NC
159
160
161
162
163
164
165
166
NC
167
I/O
I/O
GND
I/O
I/O
GCLK / I
ACLK / I
VCC
GCLK / I
GCLK / I
VCC
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VCC
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
TCK
STM
I/O
I/O
I/O
I/O
I/O
GND
I/O
VCC
I/O
I/O
I/O
240
208
PQFP PQFP
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
168
169
NC
170
171
172
173
174
175
NC
176
177
178
179
NC
180
181
182
NC
183
184
185
186
187
188
NC
189
190
191
192
193
194
NC
195
196
197
198
NC
199
200
201
202
203
204
205
206
207
Function
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
GND
VCC
I/O
I/O
I/O
I/O
VCCIO
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
VCC
I/O
I/O
I/O
I/O
I/O
TDO
Rev A
8-41
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