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EDS2532CABH-1AL-E

Description
Synchronous DRAM, 8MX32, 6ns, CMOS, PBGA90, LEAD FREE, FBGA-90
Categorystorage   
File Size635KB,48 Pages
ManufacturerELPIDA
Websitehttp://www.elpida.com/en
Environmental Compliance
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EDS2532CABH-1AL-E Overview

Synchronous DRAM, 8MX32, 6ns, CMOS, PBGA90, LEAD FREE, FBGA-90

EDS2532CABH-1AL-E Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerELPIDA
Parts packaging codeBGA
package instructionTFBGA, BGA90,9X15,32
Contacts90
Reach Compliance Codeunknown
ECCN codeEAR99
Is SamacsysN
access modeFOUR BANK PAGE BURST
Maximum access time6 ns
Other featuresAUTO/SELF REFRESH
Maximum clock frequency (fCLK)100 MHz
I/O typeCOMMON
interleaved burst length1,2,4,8
JESD-30 codeR-PBGA-B90
JESD-609 codee1
length13 mm
memory density268435456 bit
Memory IC TypeSYNCHRONOUS DRAM
memory width32
Number of functions1
Number of ports1
Number of terminals90
word count8388608 words
character code8000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize8MX32
Package body materialPLASTIC/EPOXY
encapsulated codeTFBGA
Encapsulate equivalent codeBGA90,9X15,32
Package shapeRECTANGULAR
Package formGRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)260
power supply2.5 V
Certification statusNot Qualified
refresh cycle4096
Maximum seat height1.14 mm
self refreshYES
Continuous burst length1,2,4,8,FP
Maximum standby current0.002 A
Maximum slew rate0.255 mA
Maximum supply voltage (Vsup)2.7 V
Minimum supply voltage (Vsup)2.3 V
Nominal supply voltage (Vsup)2.5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Silver/Copper (Sn/Ag/Cu)
Terminal formBALL
Terminal pitch0.8 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
width8 mm
Base Number Matches1
DATA SHEET
256M bits SDRAM
EDS2532CABH (8M words
×
32 bits)
Description
The EDS2532CABH is a 256M bits SDRAM organized
as 2,097,152 words
×
32 bits
×
4 banks. All inputs and
outputs are synchronized with the positive edge of the
clock.
It is packaged in 90-ball FBGA.
Pin Configurations
/xxx indicate active low signal.
90-ball FBGA
1
2
3
4
5
6
7
8
9
A
DQ26 DQ24 VSS
VDD DQ23 DQ21
VDDQ VSSQ DQ19
DQ22 DQ20 VDDQ
DQ17 DQ18 VDDQ
NC
A2
A10
NC
BA0
/CAS
VDD
DQ6
DQ1
DQ16 VSSQ
DQM2 VDD
A0
BA1
/CS
A1
A11
/RAS
Features
2.5V power supply
Clock frequency: 133MHz/100MHz (max.)
Single pulsed /RAS
×32
organization
4 banks can operate simultaneously and
independently
Burst read/write operation and burst read/single write
operation capability
Programmable burst length (BL): 1, 2, 4, 8 and full
page
2 variations of burst sequence
Sequential (BL = 1, 2, 4, 8, full page)
Interleave (BL = 1, 2, 4, 8)
Programmable /CAS latency (CL): 2, 3
Byte control by DQM
Address
4K Row address /512 column address
Refresh cycles
4096 refresh cycles/64ms
2 variations of refresh
Auto refresh
Self refresh
FBGA package with lead free solder (Sn-Ag-Cu)
B
DQ28 VDDQ VSSQ
C
VSSQ DQ27 DQ25
D
VSSQ DQ29 DQ30
E
VDDQ DQ31
NC
A3
A6
NC
A9
NC
VSS
F
VSS DQM3
G
A4
A5
A8
CKE
NC
H
A7
J
CLK
K
DQM1
/WE DQM0
DQ7 VSSQ
DQ5 VDDQ
DQ3 VDDQ
L
VDDQ DQ8
M
VSSQ DQ10 DQ9
N
VSSQ DQ12 DQ14
P
DQ11 VDDQ VSSQ
VDDQ VSSQ DQ4
VDD
DQ0
DQ2
R
DQ13 DQ15 VSS
(Top view)
A0 to A11
BA0, BA1
DQ0 to DQ31
/CS
/RAS
/CAS
/WE
DQM0 to DQM3
CKE
CLK
VDD
VSS
VDDQ
VSSQ
NC
Address inputs
Bank select address
Data-input/output
Chip select
Row address strobe
Column address strobe
Write enable
DQ mask enable
Clock enable
Clock input
Power for internal circuit
Ground for internal circuit
Power for DQ circuit
Ground for DQ circuit
No connection
Document No. E0395E40 (Ver. 4.0)
Date Published October 2004 (K) Japan
URL: http://www.elpida.com
Elpida
Memory, Inc. 2003-2004

EDS2532CABH-1AL-E Related Products

EDS2532CABH-1AL-E EDS2532CABH-1A-E
Description Synchronous DRAM, 8MX32, 6ns, CMOS, PBGA90, LEAD FREE, FBGA-90 Synchronous DRAM, 8MX32, 6ns, CMOS, PBGA90, LEAD FREE, FBGA-90
Is it Rohs certified? conform to conform to
Maker ELPIDA ELPIDA
Parts packaging code BGA BGA
package instruction TFBGA, BGA90,9X15,32 TFBGA, BGA90,9X15,32
Contacts 90 90
Reach Compliance Code unknown unknown
ECCN code EAR99 EAR99
Is Samacsys N N
access mode FOUR BANK PAGE BURST FOUR BANK PAGE BURST
Maximum access time 6 ns 6 ns
Other features AUTO/SELF REFRESH AUTO/SELF REFRESH
Maximum clock frequency (fCLK) 100 MHz 100 MHz
I/O type COMMON COMMON
interleaved burst length 1,2,4,8 1,2,4,8
JESD-30 code R-PBGA-B90 R-PBGA-B90
JESD-609 code e1 e1
length 13 mm 13 mm
memory density 268435456 bit 268435456 bit
Memory IC Type SYNCHRONOUS DRAM SYNCHRONOUS DRAM
memory width 32 32
Number of functions 1 1
Number of ports 1 1
Number of terminals 90 90
word count 8388608 words 8388608 words
character code 8000000 8000000
Operating mode SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 70 °C 70 °C
organize 8MX32 8MX32
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TFBGA TFBGA
Encapsulate equivalent code BGA90,9X15,32 BGA90,9X15,32
Package shape RECTANGULAR RECTANGULAR
Package form GRID ARRAY, THIN PROFILE, FINE PITCH GRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius) 260 260
power supply 2.5 V 2.5 V
Certification status Not Qualified Not Qualified
refresh cycle 4096 4096
Maximum seat height 1.14 mm 1.14 mm
self refresh YES YES
Continuous burst length 1,2,4,8,FP 1,2,4,8,FP
Maximum standby current 0.002 A 0.002 A
Maximum slew rate 0.255 mA 0.255 mA
Maximum supply voltage (Vsup) 2.7 V 2.7 V
Minimum supply voltage (Vsup) 2.3 V 2.3 V
Nominal supply voltage (Vsup) 2.5 V 2.5 V
surface mount YES YES
technology CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL
Terminal surface Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu)
Terminal form BALL BALL
Terminal pitch 0.8 mm 0.8 mm
Terminal location BOTTOM BOTTOM
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
width 8 mm 8 mm
Base Number Matches 1 1
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