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M58MR016D100ZC6

Description
Flash, 1MX16, 20ns, PBGA48, 0.50 MM PITCH, TFBGA-48
Categorystorage   
File Size390KB,51 Pages
ManufacturerNumonyx ( Micron )
Websitehttps://www.micron.com
Download Datasheet Parametric View All

M58MR016D100ZC6 Overview

Flash, 1MX16, 20ns, PBGA48, 0.50 MM PITCH, TFBGA-48

M58MR016D100ZC6 Parametric

Parameter NameAttribute value
MakerNumonyx ( Micron )
Parts packaging codeBGA
package instruction0.50 MM PITCH, TFBGA-48
Contacts48
Reach Compliance Codeunknown
ECCN codeEAR99
Is SamacsysN
Maximum access time20 ns
startup blockBOTTOM
JESD-30 codeR-PBGA-B48
length10.53 mm
memory density16777216 bit
Memory IC TypeFLASH
memory width16
Number of functions1
Number of terminals48
word count1048576 words
character code1000000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize1MX16
Package body materialPLASTIC/EPOXY
encapsulated codeTFBGA
Package shapeRECTANGULAR
Package formGRID ARRAY, THIN PROFILE, FINE PITCH
Parallel/SerialPARALLEL
Programming voltage1.8 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)2 V
Minimum supply voltage (Vsup)1.7 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formBALL
Terminal pitch0.5 mm
Terminal locationBOTTOM
typeNOR TYPE
width6.29 mm
Base Number Matches1
M58MR016C
M58MR016D
16 Mbit (1Mb x16, Mux I/O, Dual Bank, Burst)
1.8V Supply Flash Memory
PRELIMINARY DATA
s
SUPPLY VOLTAGE
– V
DD
= V
DDQ
= 1.7V to 2.0V for Program,
Erase and Read
– V
PP
= 12V for fast Program (optional)
s
s
MULTIPLEXED ADDRESS/DATA
SYNCHRONOUS / ASYNCHRONOUS READ
– Burst mode Read: 40MHz
– Page mode Read (4 Words Page)
– Random Access: 100ns
FBGA
TFBGA48 (ZC)
10 x 4 ball array
s
PROGRAMMING TIME
– 10µs by Word typical
– Two or four words programming option
s
MEMORY BLOCKS
– Dual Bank Memory Array: 4/12 Mbit
– Parameter Blocks (Top or Bottom location)
Figure 1. Logic Diagram
VDD VDDQ VPP
4
A16-A19
ADQ0-ADQ15
W
E
G
RP
WP
L
K
M58MR016C
M58MR016D
BINV
WAIT
16
s
DUAL OPERATIONS
– Read within one Bank while Program or
Erase within the other
– No delay between Read and Write operations
s
PROTECTION/SECURITY
– All Blocks protected at Power-up
– Any combination of Blocks can be protected
– 64 bit unique device identifier
– 64 bit user programmable OTP cells
– One parameter block permanently lockable
s
s
COMMON FLASH INTERFACE (CFI)
100,000 PROGRAM/ERASE CYCLES per
BLOCK
ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Top Device Code, M58MR016C: 88DEh
– Bottom Device Code, M58MR016D: 88E0h
s
VSS
AI05228
August 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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