DM74LS05N/A+ datasheet, PDF - EEWORLD Datasheet

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DM74LS05N/A+: DescriptionIC,LOGIC GATE,HEX INVERTER,LS-TTL,DIP,14PIN,PLASTIC; Categorylogic; File Size110KB，2 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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DM74LS05N/A+ Overview

IC,LOGIC GATE,HEX INVERTER,LS-TTL,DIP,14PIN,PLASTIC

DM74LS05N/A+ Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Texas Instruments
package instruction	DIP, DIP14,.3
Reach Compliance Code	unknown
Is Samacsys	N
JESD-30 code	R-PDIP-T14
JESD-609 code	e0
Logic integrated circuit type	INVERTER
MaximumI(ol)	0.008 A
Number of terminals	14
Maximum operating temperature	70 °C
Minimum operating temperature
Output characteristics	OPEN-COLLECTOR
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
Maximum supply current (ICC)	6.6 mA
Prop。Delay @ Nom-Sup	32 ns
Schmitt trigger	NO
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Base Number Matches	1

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Description	IC,LOGIC GATE,HEX INVERTER,LS-TTL,DIP,14PIN,PLASTIC	IC,LOGIC GATE,QUAD 2-INPUT NAND,LS-TTL,DIP,14PIN,CERAMIC	IC,LOGIC GATE,3 3-INPUT NAND,LS-TTL,DIP,14PIN,CERAMIC	IC,LOGIC GATE,QUAD 2-INPUT NAND,STD-TTL,DIP,14PIN,PLASTIC	IC,LOGIC GATE,DUAL 4-INPUT NAND,S-TTL,DIP,14PIN,PLASTIC	IC,LOGIC GATE,HEX INVERTER,STD-TTL,DIP,14PIN,PLASTIC	IC,LOGIC GATE,HEX INVERTER,STD-TTL,DIP,14PIN,CERAMIC	IC,LOGIC GATE,QUAD 2-INPUT NAND,STD-TTL,DIP,14PIN,PLASTIC
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments
package instruction	DIP, DIP14,.3	DIP, DIP14,.3	DIP, DIP14,.3	DIP, DIP14,.3	DIP, DIP14,.3	DIP, DIP14,.3	DIP, DIP14,.3	DIP, DIP14,.3
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
JESD-30 code	R-PDIP-T14	R-XDIP-T14	R-XDIP-T14	R-PDIP-T14	R-PDIP-T14	R-PDIP-T14	R-XDIP-T14	R-PDIP-T14
JESD-609 code	e0	e0	e0	e0	e0	e0	e0	e0
Logic integrated circuit type	INVERTER	NAND GATE	NAND GATE	NAND GATE	NAND GATE	INVERTER	INVERTER	NAND GATE
MaximumI(ol)	0.008 A	0.008 A	0.008 A	0.016 A	0.022 A	0.016 A	0.016 A	0.016 A
Number of terminals	14	14	14	14	14	14	14	14
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
Output characteristics	OPEN-COLLECTOR	OPEN-COLLECTOR	OPEN-COLLECTOR	OPEN-COLLECTOR	OPEN-COLLECTOR	OPEN-COLLECTOR	OPEN-COLLECTOR	OPEN-COLLECTOR
Package body material	PLASTIC/EPOXY	CERAMIC	CERAMIC	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	CERAMIC	PLASTIC/EPOXY
encapsulated code	DIP	DIP	DIP	DIP	DIP	DIP	DIP	DIP
Encapsulate equivalent code	DIP14,.3	DIP14,.3	DIP14,.3	DIP14,.3	DIP14,.3	DIP14,.3	DIP14,.3	DIP14,.3
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE	IN-LINE	IN-LINE	IN-LINE	IN-LINE	IN-LINE	IN-LINE
power supply	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
Prop。Delay @ Nom-Sup	32 ns	32 ns	32 ns	45 ns	11 ns	55 ns	55 ns	45 ns
Schmitt trigger	NO	NO	NO	NO	NO	NO	NO	NO
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	NO	NO	NO	NO	NO	NO	NO
technology	TTL	TTL	TTL	TTL	TTL	TTL	TTL	TTL
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE
Terminal pitch	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Base Number Matches	1	1	1	1	1	1	1	1
Maximum supply current (ICC)	6.6 mA	-	-	22 mA	18 mA	33 mA	33 mA	22 mA

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