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70V9089S9PF8

Description
TQFP-100, Reel
Categorystorage   
File Size497KB,20 Pages
ManufacturerIDT (Integrated Device Technology)
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70V9089S9PF8 Overview

TQFP-100, Reel

70V9089S9PF8 Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeTQFP
package instruction14 X 14 MM, 1.40 MM HEIGHT, TQFP-100
Contacts100
Manufacturer packaging codePN100
Reach Compliance Codenot_compliant
ECCN code3A991.B.2.B
Is SamacsysN
Maximum access time20 ns
Other featuresFLOW-THROUGH OR PIPELINED ARCHITECTURE
Maximum clock frequency (fCLK)66.7 MHz
I/O typeCOMMON
JESD-30 codeS-PQFP-G100
JESD-609 codee0
length14 mm
memory density524288 bit
Memory IC TypeDUAL-PORT SRAM
memory width8
Humidity sensitivity level3
Number of functions1
Number of ports2
Number of terminals100
word count65536 words
character code64000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize64KX8
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeLFQFP
Encapsulate equivalent codeQFP100,.63SQ,20
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE, FINE PITCH
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)240
power supply3.3 V
Certification statusNot Qualified
Maximum seat height1.6 mm
Maximum standby current0.005 A
Minimum standby current3 V
Maximum slew rate0.26 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature20
width14 mm
Base Number Matches1
HIGH-SPEED 3.3V
64/32K x 8 SYNCHRONOUS
DUAL-PORT STATIC RAM
Features:
70V9089/79L
True Dual-Ported memory cells which allow simultaneous
access of the same memory location
High-speed clock to data access
– Commercial: 7.5ns (max.)
– Industrial: 12ns (max.)
Low-power operation
– IDT70V9089/79L
Active: 429mW (typ.)
Standby: 1.32mW (typ.)
Flow-Through or Pipelined output mode on either port via
the
FT/PIPE
pin
Dual chip enables allow for depth expansion without
additional logic
Counter enable and reset features
Full synchronous operation on both ports
– 4ns setup to clock and 1ns hold on all control, data, and
address inputs
– Data input, address, and control registers
– Fast 7.5ns clock to data out in the Pipelined output mode
– Self-timed write allows fast cycle time
– 12ns cycle time, 83MHz operation in the Pipelined output mode
LVTTL- compatible, single 3.3V (±0.3V) power supply
Available in a 100 pin Thin Quad Flatpack (TQFP) package
Green parts available, see ordering information
Functional Block Diagram
R/W
L
OE
L
CE
0L
CE
1L
R/W
R
OE
R
CE
0R
CE
1R
1
0
0/1
1
0
0/1
FT/PIPE
L
0/1
1
0
0
1
0/1
FT/PIPE
R
,
I/O
0L
- I/O
7L
I/O
Control
I/O
Control
I/O
0R
- I/O
7R
A
15L
(1)
A
0L
CLK
L
ADS
L
CNTEN
L
CNTRST
L
Counter/
Address
Reg.
MEMORY
ARRAY
Counter/
Address
Reg.
A
15R
(1)
A
0R
CLK
R
ADS
R
CNTEN
R
CNTRST
R
3750 drw 01
NOTE:
1. A
15X
is a NC for IDT70V9079.
SEPTEMBER 2019
1
©2019 Integrated Device Technology, Inc.
DSC 3750/14
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