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DM74LS259MX

Description
D Latch, LS Series, 1-Func, Low Level Triggered, 8-Bit, True Output, TTL, PDSO16, 0.150 INCH, MS-012, SOIC-16
Categorylogic   
File Size59KB,6 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Download Datasheet Parametric Compare View All

DM74LS259MX Overview

D Latch, LS Series, 1-Func, Low Level Triggered, 8-Bit, True Output, TTL, PDSO16, 0.150 INCH, MS-012, SOIC-16

DM74LS259MX Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerFairchild
Parts packaging codeSOIC
package instruction0.150 INCH, MS-012, SOIC-16
Contacts16
Reach Compliance Codeunknown
Is SamacsysN
Other features1:8 DMUX FOLLOWED BY LATCH
seriesLS
JESD-30 codeR-PDSO-G16
JESD-609 codee0
length9.9 mm
Logic integrated circuit typeD LATCH
MaximumI(ol)0.008 A
Number of digits8
Number of functions1
Number of terminals16
Maximum operating temperature70 °C
Minimum operating temperature
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP16,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Maximum supply current (ICC)36 mA
Prop。Delay @ Nom-Sup35 ns
propagation delay (tpd)35 ns
Certification statusNot Qualified
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger typeLOW LEVEL
width3.9 mm
Base Number Matches1
DM74LS259 8-Bit Addressable Latches
August 1986
Revised March 2000
DM74LS259
8-Bit Addressable Latches
General Description
These 8-bit addressable latches are designed for general
purpose storage applications in digital systems. Specific
uses include working registers, serial-holding registers,
and active-high decoders or demultiplexers. They are mul-
tifunctional devices capable of storing single-line data in
eight addressable latches, and being a 1-of-8 decoder or
demultiplexer with active-high outputs.
Four distinct modes of operation are selectable by control-
ling the clear and enable inputs as enumerated in the func-
tion table. In the addressable-latch mode, data at the data-
in terminal is written into the addressed latch. The
addressed latch will follow the data input with all unad-
dressed latches remaining in their previous states. In the
memory mode, all latches remain in their previous states
and are unaffected by the data or address inputs. To elimi-
nate the possibility of entering erroneous data in the
latches, the enable should be held HIGH (inactive) while
the address lines are changing. In the 1-of-8 decoding or
demultiplexing mode, the addressed output will follow the
level of the D input with all other outputs LOW. In the clear
mode, all outputs are LOW and unaffected by the address
and data inputs.
Features
s
8-Bit parallel-out storage register performs serial-to-par-
allel conversion with storage
s
Asynchronous parallel clear
s
Active high decoder
s
Enable/disable input simplifies expansion
s
Direct replacement for Fairchild DM9334
s
Expandable for N-bit applications
s
Four distinct functional modes
s
Typical propagation delay times:
Enable-to-output
Data-to-output
Clear-to-output
s
Fan-out
I
OL
(sink current)
s
Typical I
CC
22 mA
8 mA
I
OH
(source current)
−0.4
mA
18 ns
16 ns
17 ns
Address-to-output 21 ns
Ordering Code:
Order Number
DM74LS259M
DM74LS259WM
DM74LS259N
Package Number
M16A
M16B
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
© 2000 Fairchild Semiconductor Corporation
DS006418
www.fairchildsemi.com

DM74LS259MX Related Products

DM74LS259MX DM74LS259WMX DM74LS259CW
Description D Latch, LS Series, 1-Func, Low Level Triggered, 8-Bit, True Output, TTL, PDSO16, 0.150 INCH, MS-012, SOIC-16 D Latch, LS Series, 1-Func, Low Level Triggered, 8-Bit, True Output, TTL, PDSO16, 0.300 INCH, MS-013, SOIC-16 D Latch, LS Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, TTL, WAFER
Maker Fairchild Fairchild Fairchild
Parts packaging code SOIC SOIC WAFER
package instruction 0.150 INCH, MS-012, SOIC-16 SOP, SOP16,.4 DIE,
Reach Compliance Code unknown unknown unknown
Other features 1:8 DMUX FOLLOWED BY LATCH 1:8 DMUX FOLLOWED BY LATCH 1:8 DMUX FOLLOWED BY LATCH
series LS LS LS
JESD-30 code R-PDSO-G16 R-PDSO-G16 X-XUUC-N16
Logic integrated circuit type D LATCH D LATCH D LATCH
Number of digits 8 8 8
Number of functions 1 1 1
Number of terminals 16 16 16
Maximum operating temperature 70 °C 70 °C 70 °C
Output polarity TRUE TRUE TRUE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY UNSPECIFIED
encapsulated code SOP SOP DIE
Package shape RECTANGULAR RECTANGULAR UNSPECIFIED
Package form SMALL OUTLINE SMALL OUTLINE UNCASED CHIP
propagation delay (tpd) 35 ns 35 ns 32 ns
Certification status Not Qualified Not Qualified Not Qualified
Maximum supply voltage (Vsup) 5.25 V 5.25 V 5.25 V
Minimum supply voltage (Vsup) 4.75 V 4.75 V 4.75 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V
surface mount YES YES YES
technology TTL TTL TTL
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL
Terminal form GULL WING GULL WING NO LEAD
Terminal location DUAL DUAL UPPER
Trigger type LOW LEVEL LOW LEVEL POSITIVE EDGE
Is it Rohs certified? incompatible incompatible -
Contacts 16 16 -
JESD-609 code e0 e0 -
length 9.9 mm 10.3 mm -
MaximumI(ol) 0.008 A 0.008 A -
Encapsulate equivalent code SOP16,.25 SOP16,.4 -
method of packing TAPE AND REEL TAPE AND REEL -
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED -
power supply 5 V 5 V -
Maximum supply current (ICC) 36 mA 36 mA -
Prop。Delay @ Nom-Sup 35 ns 35 ns -
Maximum seat height 1.75 mm 2.65 mm -
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) -
Terminal pitch 1.27 mm 1.27 mm -
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED -
width 3.9 mm 7.5 mm -
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