54LS244 DM74LS244 Octal TRI-STATE Buffers Line Drivers Line Receivers
August 1989
54LS244 DM74LS244 Octal TRI-STATE
Buffers Line Drivers Line Receivers
General Description
These buffers line drivers are designed to improve both the
performance and PC board density of TRI-STATE buffers
drivers employed as memory-address drivers clock drivers
and bus-oriented transmitters receivers Featuring 400 mV
of hysteresis at each low current PNP data line input they
provide improved noise rejection and high fanout outputs
and can be used to drive terminated lines down to 133X
Y
Y
Y
Features
Y
Y
Y
Y
Y
TRI-STATE outputs drive bus lines directly
PNP inputs reduce DC loading on bus lines
Hysteresis at data inputs improves noise margins
Typical I
OL
(sink current)
54LS
12 mA
74LS
24 mA
Typical I
OH
(source current)
b
12 mA
54LS
b
15 mA
74LS
Typical propagation delay times
Inverting
10 5 ns
Noninverting 12 ns
Typical enable disable time 18 ns
Typical power dissipation (enabled)
Inverting
130 mW
Noninverting 135 mW
Connection Diagram
Dual-In-Line Package
TL F 8442 – 1
Order Number 54LS244DMQB 54LS244FMQB 54LS244LMQB
DM74LS244WM or DM74LS244N
See NS Package Number E20A J20A M20B N20A or W20A
Function Table
Inputs
G
L
L
H
A
L
H
X
Output
Y
L
H
Z
L
e
Low Logic Level
H
e
High Logic Level
X
e
Either Low or High Logic Level
Z
e
High Impedance
TRI-STATE is a registered trademark of National Semiconductor Corporation
C
1995 National Semiconductor Corporation
TL F 8442
RRD-B30M105 Printed in U S A
Absolute Maximum Ratings
(Note)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage
7V
Input Voltage
7V
Operating Free Air Temperature Range
b
55 C to
a
125 C
54LS
DM74LS
0 C to
a
70 C
b
65 C to
a
150 C
Storage Temperature Range
Note
The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaran-
teed The device should not be operated at these limits The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation
Recommended Operating Conditions
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
T
A
Parameter
Min
Supply Voltage
High Level Input Voltage
Low Level Input Voltage
High Level Output Current
Low Level Output Current
Free Air Operating Temperature
b
55
54LS244
Nom
5
Max
55
Min
4 75
2
07
b
12
DM74LS244
Nom
5
Max
5 25
Units
V
V
08
b
15
45
2
V
mA
mA
C
12
125
0
24
70
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
V
I
HYS
V
OH
Parameter
Input Clamp Voltage
Hysteresis (V
T
a
b
V
T
b
)
Data Inputs Only
High Level Output Voltage
Conditions
V
CC
e
Min I
I
e b
18 mA
V
CC
e
Min
V
CC
e
Min V
IH
e
Min
V
IL
e
Max I
OH
e b
1 mA
V
CC
e
Min V
IH
e
Min
V
IL
e
Max I
OH
e b
3 mA
V
CC
e
Min V
IH
e
Min
V
IL
e
0 5V I
OH
e
Max
V
OL
Low Level Output Voltage
V
CC
e
Min
V
IL
e
Max
V
IH
e
Min
V
CC
e
Max
V
IL
e
Max
V
IH
e
Min
V
CC
e
Max
V
CC
e
Max
V
CC
e
Max
I
OL
e
12 mA
I
OL
e
Max
V
O
e
2 7V
V
O
e
0 4V
V
I
e
7V (DM74)
V
I
e
10V (54LS)
V
I
e
2 7V
V
I
e
0 4V
54LS
DM74
I
CC
Supply Current
V
CC
e
Max
Outputs Open
Outputs High
Outputs Low
Outputs Disabled
Note 1
All typicals are at V
CC
e
5V T
A
e
25 C
Note 2
Not more than one output should be shorted at a time and the duration should not exceed one second
Min
Typ
(Note 1)
Max
b
1 5
Units
V
V
02
DM74
54LS DM74
54LS DM74
54LS DM74
DM74
27
24
2
04
34
V
04
05
20
b
20
V
I
OZH
I
OZL
I
I
I
IH
I
IL
I
OS
Off-State Output Current
High Level Voltage Applied
Off-State Output Current
Low Level Voltage Applied
Input Current at Maximum
Input Voltage
High Level Input Current
Low Level Input Current
Short Circuit Output Current
mA
mA
mA
mA
mA
mA
01
20
b
0 5
b
50
b
40
b
200
b
225
V
CC
e
Max (Note 2)
13
27
32
23
46
54
mA
2
Switching Characteristics
at V
CC
e
5V
Symbol
t
PLH
t
PHL
t
PZL
t
PZH
t
PLZ
t
PHZ
t
PLH
t
PHL
t
PZL
t
PZH
Parameter
Propagation Delay Time
Low to High Level Output
Propagation Delay Time
High to Low Level Output
Output Enable Time to
Low Level
Output Enable Time to
High Level
Output Disable Time
from Low Level
Output Disable Time
from High Level
Propagation Delay Time
Low to High Level Output
Propagation Delay Time
High to Low Level Output
Output Enable Time to
Low Level
Output Enable Time to
High Level
T
A
e
25 C (see Section 1 for Test Waveforms and Output Load)
54LS Max
18
18
30
23
25
18
DM74LS Max
18
18
30
23
25
18
21
22
33
26
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Conditions
C
L
e
45 pF
R
L
e
667X
C
L
e
45 pF
R
L
e
667X
C
L
e
45 pF
R
L
e
667X
C
L
e
45 pF
R
L
e
667X
C
L
e
5 pF
R
L
e
667X
C
L
e
5 pF
R
L
e
667X
C
L
e
150 pF
R
L
e
667X
C
L
e
150 pF
R
L
e
667X
C
L
e
150 pF
R
L
e
667X
C
L
e
150 pF
R
L
e
667X
Note
54LS Output Load is C
L
e
50 pF for t
PLH
t
PHL
t
PZL
and t
PZH
3
Physical Dimensions
inches (millimeters)
Ceramic Leadless Chip Carrier Package (E)
Order Number 54LS244LMQB
NS Package Number E20A
20-Lead Ceramic Dual-In-Line Package (J)
Order Number 54LS244DMQB
NS Package Number J20A
4
Physical Dimensions
inches (millimeters) (Continued)
20-Lead Wide Small Outline Molded Package (M)
Order Number DM74LS244WM
NS Package Number M20B
20-Lead Molded Dual-In-Line Package (N)
Order Number DM74LS244N
NS Package Number N20A
5
Integrated technical exchanges
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