ITF86174SQT
Data Sheet
January 2002
9A, 30V, 0.016 Ohm, P-Channel, Logic
Level, Power MOSFET
Packaging
TSSOP-8
Features
• Ultra Low On-Resistance
- r
DS(ON)
= 0.016
Ω,
V
GS
= −
10V
- r
DS(ON)
= 0.024
Ω,
V
GS
= −
4.5V
- r
DS(ON)
= 0.027
Ω,
V
GS
= −
4V
• Gate to Source Protection Diode
• Simulation Models
- Temperature Compensated PSPICE™ and SABER
Electrical Models
- Spice and SABER Thermal Impedance Models
- www.fairchildsemi.com
• Peak Current vs Pulse Width Curve
5
3
4
1
2
Symbol
DRAIN(1)
SOURCE(2)
DRAIN(8)
SOURCE(7)
• Transient Thermal Impedance Curve vs Board Mounting
Area
• Switching Time vs R
GS
Curves
Ordering Information
PART NUMBER
ITF86174SQT
PACKAGE
TSSOP-8
86174
BRAND
SOURCE(3)
GATE(4)
SOURCE(6)
DRAIN(5)
NOTE: When ordering, use the entire part number. ITF86174SQT2
is available only in tape and reel.
Absolute Maximum Ratings
T
A
= 25
o
C, Unless Otherwise Specified
ITF86174SQT
-30
-30
±
20
9.0
7.0
4.5
4.0
Figure 4
2.0
16
-55 to 150
300
260
UNITS
V
V
V
A
A
A
A
W
mW/
o
C
o
C
o
C
o
C
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
Drain to Gate Voltage (R
GS
= 20k
Ω
) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Drain Current
Continuous (T
A
= 25
o
C, V
GS
= 10V) (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Continuous (T
A
= 25
o
C, V
GS
= 4.5V) (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Continuous (T
A
= 100
o
C, V
GS
= 4.5V) (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Continuous (T
A
= 100
o
C, V
GS
= 4.0V) (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
DM
Power Dissipation (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Derate Above 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief TB370 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
NOTES:
1. T
J
= 25
o
C to 125
o
C.
2. 62.5
o
C/W measured using FR-4 board with 1.0in
2
(645.2mm
2
) copper pad at 10s.
CAUTION:
Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
©2002 Fairchild Semiconductor Corporation
ITF86174SQT Rev. B
ITF86174SQT
Electrical Specifications
PARAMETER
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage
Drain to Source On Resistance
V
GS(TH)
r
DS(ON)
V
GS
= V
DS
, I
D
= 250
µ
A Figure 10
I
D
= 9.0A, V
GS
= -10V Figures 8, 9
I
D
= 4.5A, V
GS
= -4.5V Figure 8
I
D
= 4.0A, V
GS
= -4.0V Figure 8
THERMAL SPECIFICATIONS
Thermal Resistance Junction to
Ambient
R
θ
JA
Pad Area = 1.0 in
2
(645.2 mm
2
) (Note 2)
Pad Area = 0.035 in
2
(22.4 mm
2
) Figure 20
Pad Area = 0.0045 in
2
(2.88 mm
2
) Figure 20
SWITCHING SPECIFICATIONS
V
GS
= -4.5V
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
SWITCHING SPECIFICATIONS
V
GS
= -10V
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
GATE CHARGE SPECIFICATIONS
Total Gate Charge
Gate Charge at -5V
Threshold Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
CAPACITANCE SPECIFICATIONS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
C
ISS
C
OSS
C
RSS
V
DS
= -25V, V
GS
= 0V,
f = 1MHz
Figure 12
-
-
-
2000
475
215
-
-
-
pF
pF
pF
Q
g(TOT)
Q
g(-5)
Q
g(TH)
Q
gs
Q
gd
V
GS
= 0V to -10V
V
GS
= 0V to -5V
V
GS
= 0V to -1V
V
DD
= -15V,
I
D
= 7.0A,
I
g(REF)
= -1.0mA
Figures 13, 16, 17
-
-
-
-
-
39
22
2
5.7
8.8
-
-
-
-
-
nC
nC
nC
nC
nC
t
d(ON)
t
r
t
d(OFF)
t
f
V
DD
= -15V, I
D
= 9.0A
V
GS
=
-10V,
R
GS
= 7.5
Ω
Figures 15, 18, 19
-
-
-
-
13
52
67
62
-
-
-
-
ns
ns
ns
ns
t
d(ON)
t
r
t
d(OFF)
t
f
V
DD
= -15V, I
D
= 4.5A
V
GS
=
-4.5V,
R
GS
= 6.8
Ω
Figures 14, 18, 19
-
-
-
-
19
64
40
48
-
-
-
-
ns
ns
ns
ns
-
-
-
-
-
-
62.5
165.4
206.8
o
C/W
o
C/W
o
C/W
T
A
= 25
o
C, Unless Otherwise Specified
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
BV
DSS
I
DSS
I
GSS
I
D
= 250
µ
A, V
GS
= 0V Figure 11
V
DS
= -30V, V
GS
= 0V
V
GS
=
±
20V
-30
-
-
-
-
-
-
-1
±
10
V
µ
A
µ
A
-1.0
-
-
-
-
0.012
0.018
0.020
-2.5
0.016
0.024
0.027
V
Ω
Ω
Ω
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage
Reverse Recovery Time
Reverse Recovered Charge
SYMBOL
V
SD
t
rr
Q
RR
I
SD
= -9.0A
I
SD
= -9.0A, dI
SD
/dt = 100A/µs
I
SD
= -9.0A, dI
SD
/dt = 100A/µs
TEST CONDITIONS
MIN
-
-
-
TYP
-0.8
26
14
MAX
-
-
-
UNITS
V
ns
nC
©2002 Fairchild Semiconductor Corporation
ITF86174SQT Rev.B
ITF86174SQT
Typical Performance Curves
1.2
POWER DISSIPATION MULTIPLIER
1.0
I
D
, DRAIN CURRENT (A)
0.8
0.6
0.4
0.2
0
-10
-8
V
GS
= -10V, R
θJA
= 62.5
o
C/W
-6
-4
-2
V
GS
= -4.0V, R
θJA
= 187.7
o
C/W
0
0
25
50
75
100
125
150
25
50
75
100
125
150
T
A
, AMBIENT TEMPERATURE (
o
C)
T
A
, AMBIENT TEMPERATURE (
o
C)
FIGURE 1. NORMALIZED POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
AMBIENT TEMPERATURE
3
1
THERMAL IMPEDANCE
Z
θJA
, NORMALIZED
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.02
0.01
P
DM
t
1
t
2
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θJA
x R
θJA
+ T
A
10
-1
10
0
10
1
10
2
10
3
R
θJA
= 62.5
o
C/W
0.1
0.01
SINGLE PULSE
0.001
10
-5
10
-4
10
-3
10
-2
t, RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
-800
R
θJA
= 62.5
o
C/W
T
C
= 25
o
C
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
I
DM
, PEAK CURRENT (A)
-100
V
GS
= -4.0V
I = I
25
150 - T
A
125
-10
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
10
-4
10
-3
10
-2
10
-1
t, PULSE WIDTH (s)
10
0
10
1
10
2
10
3
-5
10
-5
FIGURE 4. PEAK CURRENT CAPABILITY
©2002 Fairchild Semiconductor Corporation
ITF86174SQT Rev. B
ITF86174SQT
Typical Performance Curves
-500
R
θJA
I
D
, DRAIN CURRENT (A)
= 62.5
o
C/W
(Continued)
-40
SINGLE PULSE
T
J
= MAX RATED
T
A
= 25
o
C
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
DD
= -15V
-30
-100
100µs
I
D,
DRAIN CURRENT (A)
-20
T
J
= 150
o
C
-10
T
J
= -55
o
C
T
J
= 25
o
C
0
-1.5
-10
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
-1
-1
-10
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
-60
1ms
10ms
-2.0
-2.5
-3.0
-3.5
V
GS
, GATE TO SOURCE VOLTAGE (V)
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
FIGURE 6. TRANSFER CHARACTERISTICS
-40
V
GS
= -10V
V
GS
= -5V
V
GS
= -4.5V
V
GS
= -4V
V
GS
= -3.5V
30
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
r
DS(ON)
, DRAIN TO SOURCE
ON RESISTANCE (mΩ)
I
D
= -9A
25
I
D
, DRAIN CURRENT (A)
-30
V
GS
= -3V
-20
20
I
D
= -1A
15
-10
T
A
= 25
o
C
0
0
-0.5
-1.0
-1.5
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
10
-2
-3
-4
-5
-6
-7
-8
-9
-10
V
GS
, GATE TO SOURCE VOLTAGE (V)
FIGURE 7. SATURATION CHARACTERISTICS
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
1.6
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
1.4
V
GS
= -10V, I
D
= -9A
NORMALIZED GATE
THRESHOLD VOLTAGE
1.2
V
GS
= V
DS
, I
D
= -250µA
1.0
1.2
1.0
0.8
0.8
0.6
-80
0.6
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
©2002 Fairchild Semiconductor Corporation
ITF86174SQT Rev.B
ITF86174SQT
Typical Performance Curves
1.10
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
I
D
= -250µA
C
OSS
≅
C
DS
+ C
GD
1000
C
ISS
=
C
GS
+ C
GD
(Continued)
3000
1.00
0.95
C, CAPACITANCE (pF)
1.05
C
RSS
=
C
GD
V
GS
= 0V, f = 1MHz
0.90
-80
-40
0
40
80
120
160
100
-0.1
-1.0
-10
-30
T
J
, JUNCTION TEMPERATURE (
o
C)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
-10
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
DD
= -15V
-8
SWITCHING TIME (ns)
150
200
V
GS
= -4.5V, V
DD
= -15V, I
D
= -4.5A
t
r
t
f
-6
t
d(OFF)
100
-4
WAVEFORMS IN
DESCENDING ORDER:
I
D
= -9A
I
D
= -1A
0
10
20
Q
g
, GATE CHARGE (nC)
30
40
-2
50
t
d(ON)
0
0
0
10
20
30
40
50
R
GS
, GATE TO SOURCE RESISTANCE (Ω)
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260.
FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT
GATE CURRENT
FIGURE 14. SWITCHING TIME vs GATE RESISTANCE
300
V
GS
= -10V, V
DD
= -15V, I
D
= -9A
250
SWITCHING TIME (ns)
200
t
f
150
t
d(OFF)
100
50
0
0
10
20
30
40
50
R
GS
, GATE TO SOURCE RESISTANCE (Ω)
t
r
t
d(ON)
FIGURE 15. SWITCHING TIME vs GATE RESISTANCE
©2002 Fairchild Semiconductor Corporation
ITF86174SQT Rev. B
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