KSZ9692MPBI datasheet, PDF - EEWORLD Datasheet

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KSZ9692MPBI: DescriptionSPECIALTY MICROPROCESSOR CIRCUIT, PBGA400; CategoryMicrocontrollers and processors; File Size924KB，44 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

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KSZ9692MPBI Overview

SPECIALTY MICROPROCESSOR CIRCUIT, PBGA400

KSZ9692MPBI Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Microchip
package instruction	LEAD FREE, PLASTIC, BGA-400
Reach Compliance Code	compliant
Is Samacsys	N
Other features	ALSO REQUIRES 3.3V I/O SUPPLY
JESD-30 code	S-PBGA-B400
JESD-609 code	e1
length	27 mm
Humidity sensitivity level	3
Number of terminals	400
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	250
Certification status	Not Qualified
Maximum seat height	2.46 mm
Maximum supply voltage	1.365 V
Minimum supply voltage	1.235 V
Nominal supply voltage	1.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	TIN SILVER COPPER
Terminal form	BALL
Terminal pitch	1.27 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	40
width	27 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR CIRCUIT
Base Number Matches	1

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KSZ9692MPB/KSZ9692XPB

Integrated Gigabit Networking and

Communications Controller

Rev. 4.0

General Description

The KSZ9692MPB/KSZ9692XPB is a highly-integrated

System-on-Chip (SoC) containing an ARM 922T 32-bit

processor and a rich set of peripherals to address the cost-

sensitive, high-performance needs of a wide variety of

high-bandwidth

networking

and

communications

applications.

SDIO/SD Host Controller (for KSZ9692MPB only)

•

Meets SD Host Controller Standard Specification

Version 1.0

•

Meets SDIO card specification Version 1.0

DMA Controllers

•

Dedicated DMA channels for PCI, USB, SDIO and

Ethernet ports.

Peripherals

•

Four high-speed UART ports up to 5 Mbps

•

Two programmable 32-bit timers with watchdog timer

capability

•

Interrupt Controller

•

Twenty GPIO ports

•

One shared SPI/I2C interface

•

One I2S port

Debugging

•

ARM9 JTAG debug interface

•

JTAG Boundary Scan Support

Power Management

•

CPU and system clock speed step-down options

•

Ethernet port Wake-on-LAN

•

DDR and PCI power down

Operating Voltage

•

1.3V power for core

•

3.3V power for I/O

•

2.5V or 2.6V power for DDR memory interface

Reference Hardware and Software Evaluation Kit

•

Hardware Evaluation Kit

•

Software Evaluation Kit includes WinCE BSP, Open

WRT BSP, Linux based SOHO Router packages

Features

ARM 922T High-Performance Processor Core

•

250 MHz ARM 922T RISC processor core

•

8KB I-cache and 8KB D-cache

•

Configurable Memory Management Unit (MMU) for

Linux and WinCE

Memory Controller

•

8/16-bit external bus interface for FLASH, ROM, SRAM,

and external I/O

•

NAND FLASH controller with boot option

•

200MHz 32-bit DDR controller

•

Two JEDEC Specification JESD82-1-compliant

differential clock drivers for a glueless DDR interface

solution

Ethernet Interfaces

•

Two Gb (10/100/1000 Mbps) MACs

•

MII or RGMII interface

•

Fully compliant with IEEE 802.3 Ethernet standards

PCI Interface

•

Version PCI 2.3

•

32-bit 33/66 MHz

•

Integrated PCI Arbiter supports three external masters

for KSZ9692MPB and one external master for

KSZ9692XPB

•

Configurable as Host bridge or Guest device

•

Glueless Support for mini-PCI or CardBus devices

Dual High-Speed USB 2.0 Interfaces

•

Two USB2.0 ports with integrated PHY

•

Can be configured as 2-port host, or host + device

Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (

408

) 944-0800 • fax + 1 (408) 474-1000 •

http://www.micrel.com

March 2010

M9999-031810-4.0

Micrel, Inc.

KSZ9692MPB/KSZ9692XPB

Contents

System Level Applications ...................................................................................................................................................... 6

Functional Description............................................................................................................................................................. 7

ARM High-Performance Processor .................................................................................................................................. 10

FLASH/ROM/SRAM Memory and External I/O Interface ................................................................................................. 10

NAND Flash Memory Interface......................................................................................................................................... 12

DDR Controller.................................................................................................................................................................. 13

SDIO/SD Host Controller (for KSZ9692MPB only)........................................................................................................... 17

PCI Interface ..................................................................................................................................................................... 19

Ethernet MAC Ports (Port 0 = WAN, Port 1 = LAN) ......................................................................................................... 19

Wake-on-LAN ............................................................................................................................................................... 20

Link Change.................................................................................................................................................................. 20

Wake-up Packet ........................................................................................................................................................... 20

Magic Packet ................................................................................................................................................................ 20

IPv6 Support ................................................................................................................................................................. 21

DMA Controller ................................................................................................................................................................. 21

UART Interface ................................................................................................................................................................. 21

Timers and Watchdog....................................................................................................................................................... 21

GPIO ................................................................................................................................................................................. 22

I2C .................................................................................................................................................................................... 22

SPI .................................................................................................................................................................................... 22

I2S..................................................................................................................................................................................... 22

Interrupt Controller ............................................................................................................................................................ 22

Absolute Maximum Ratings .................................................................................................................................................. 39

Operating Ratings ................................................................................................................................................................. 39

Electrical Characteristics ...................................................................................................................................................... 39

Timing Specifications ............................................................................................................................................................ 40

Signal Location Information................................................................................................................................................... 43

Package Information ............................................................................................................................................................. 44

March 2010

M9999-031810-4.0

Micrel, Inc.

KSZ9692MPB/KSZ9692XPB

List of Figures

Note: SDIO block for KSZ9692MPB only................................................................................................................................ 2

Figure 1. KSZ9692MPB/XPB Block Diagram ........................................................................................................................ 2

Figure 2. Peripheral Options and Examples ........................................................................................................................... 6

Figure 3. KSZ9692MPB Functional Block Diagram ............................................................................................................... 8

Figure 4. KSZ9692XPB Functional Block Diagram................................................................................................................ 9

Figure 4. Static Memory Interface Examples ........................................................................................................................ 11

Figure 5. External I/O Interface Examples ............................................................................................................................ 11

Figure 7. 16-bit NAND Interface Examples........................................................................................................................... 13

Figure 8. Single 16-bit DDR Memory Device Interface Example.......................................................................................... 14

Figure 10. Burst DDR Read Timing ...................................................................................................................................... 16

Figure 11. Burst DDR Write Timing....................................................................................................................................... 16

Figure 12. USB 2.0 Configuration as Two-Port Host ............................................................................................................ 18

Figure 13. USB 2.0 Configuration as Host + Device............................................................................................................. 18

Figure 14. Reset Circuit ........................................................................................................................................................ 23

Figure 15. Power and Clocks ................................................................................................................................................ 23

Figure 16. Reset Timing........................................................................................................................................................ 40

Figure 17. Static Memory Read Cycle .................................................................................................................................. 40

Figure 18. Static Memory Write Cycle .................................................................................................................................. 41

Figure 19. External I/O Read and Write Cycles .................................................................................................................... 41

Figure 20. Ball Grid Array Map.............................................................................................................................................. 43

Figure 21. 400-Pin PBGA...................................................................................................................................................... 44

List of Tables

Table 1. Reset Timing Parameters ....................................................................................................................................... 40

Table 2. Programmable Static Memory Timing Parameters................................................................................................. 41

Table 3. External I/O Memory Timing Parameters................................................................................................................ 42

Table 4. Programmable External I/O Timing Parameters..................................................................................................... 42

March 2010

M9999-031810-4.0

KSZ9692MPBI Related Products

	KSZ9692MPBI	KSZ9692MPB
Description	SPECIALTY MICROPROCESSOR CIRCUIT, PBGA400	SPECIALTY MICROPROCESSOR CIRCUIT, PBGA400
Is it Rohs certified?	conform to	conform to
Maker	Microchip	Microchip
package instruction	LEAD FREE, PLASTIC, BGA-400	LEAD FREE, PLASTIC, BGA-400
Reach Compliance Code	compliant	compliant
Other features	ALSO REQUIRES 3.3V I/O SUPPLY	ALSO REQUIRES 3.3V I/O SUPPLY
JESD-30 code	S-PBGA-B400	S-PBGA-B400
JESD-609 code	e1	e1
length	27 mm	27 mm
Humidity sensitivity level	3	3
Number of terminals	400	400
Maximum operating temperature	85 °C	70 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	BGA	BGA
Package shape	SQUARE	SQUARE
Package form	GRID ARRAY	GRID ARRAY
Peak Reflow Temperature (Celsius)	250	250
Certification status	Not Qualified	Not Qualified
Maximum seat height	2.46 mm	2.46 mm
Maximum supply voltage	1.365 V	1.365 V
Minimum supply voltage	1.235 V	1.235 V
Nominal supply voltage	1.3 V	1.3 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	INDUSTRIAL	COMMERCIAL
Terminal surface	TIN SILVER COPPER	TIN SILVER COPPER
Terminal form	BALL	BALL
Terminal pitch	1.27 mm	1.27 mm
Terminal location	BOTTOM	BOTTOM
Maximum time at peak reflow temperature	40	40
width	27 mm	27 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR CIRCUIT	MICROPROCESSOR CIRCUIT
Base Number Matches	1	1

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