WM8904CGEFL/RV datasheet, PDF - EEWORLD Datasheet

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WM8904CGEFL/RV: CategoryWireless rf/communication Telecom circuit; File Size3MB，184 Pages; ManufacturerCirrus Logic; Websitehttp://www.cirrus.com; Environmental Compliance

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WM8904CGEFL/RV Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Cirrus Logic
package instruction	HVQCCN,
Reach Compliance Code	compliant
Law of compression and extension	A/MU-LAW
filter	YES
JESD-30 code	S-PQCC-N32
length	4 mm
Humidity sensitivity level	3
Number of functions	1
Number of terminals	32
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	HVQCCN
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Maximum seat height	0.8 mm
Nominal supply voltage	1 V
surface mount	YES
technology	CMOS
Telecom integrated circuit types	PCM CODEC
Temperature level	INDUSTRIAL
Terminal form	NO LEAD
Terminal pitch	0.4 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	4 mm
Base Number Matches	1

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WM8904

Ultra Low-Power Codec for Portable Audio Applications

DESCRIPTION

The WM8904 is a high performance ultra-low power stereo

CODEC optimised for portable audio applications.

The device features stereo ground-referenced headphone

amplifiers using the Wolfson ‘Class-W’ amplifier techniques -

incorporating an innovative dual-mode charge pump

architecture - to optimise efficiency and power consumption

during playback. The ground-referenced headphone and line

outputs eliminate AC coupling capacitors, and both outputs

include common mode feedback paths to reject ground

noise.

Control sequences for audio path setup can be pre-loaded

and executed by an integrated control write sequencer to

reduce software driver development and minimise pops and

clicks via SilentSwitch™ technology.

The analogue input stage can be configured for single

ended or differential inputs. Up to 3 stereo microphone or

line inputs may be connected. The input impedance is

constant with PGA gain setting.

A stereo digital microphone interface is provided, with a

choice of two inputs.

A dynamic range controller provides compression and level

control to support a wide range of portable recording

applications. Anti-clip and quick release features offer good

performance in the presence of loud impulsive noises.

ReTune

Mobile 5-band parametric equaliser with fully

programmable coefficients is integrated for optimization of

speaker characteristics. Programmable dynamic range

control is also available for maximizing loudness, protecting

speakers from clipping and preventing premature shutdown

due to battery droop.

Common audio sampling frequencies are supported from a

wide range of external clocks, either directly or generated

via the FLL.

The WM8904 can operate directly from a single 1.8V

switched supply. For optimal power consumption, the digital

core can be operated from a 1.0V supply.

FEATURES



3.0mW quiescent power consumption for DAC to

headphone playback

DAC SNR 96dB typical, THD -86dB typical

ADC SNR 91dB typical, THD -80dB typical

2.4mW quiescent power consumption for analogue bypass

playback

Control write sequencer for pop minimised start-up and

shutdown

Single register write for default start-up sequence

Integrated FLL provides all necessary clocks



Self-clocking modes allow processor to sleep

All standard sample rates from 8kHz to 96kHz



Stereo digital microphone input

3 single ended inputs per stereo channel

1 fully differential mic / line input per stereo channel

Digital Dynamic Range Controller (compressor / limiter)

Digital sidetone mixing

Ground-referenced headphone driver

Ground-referenced line outputs

32-pin QFN package (4 x 4mm, 0.4mm pitch)

36-ball WLCSP package (2.6 x 2.5mm, 6 x 6 ball grid,

0.4mm pitch)

APPLICATIONS



Portable multimedia players

Multimedia handsets

Handheld gaming

Wireless headsets

Mobile internet devices

Netbooks

http://www.cirrus.com



Cirrus Logic, Inc., 2009–2016

Rev 4.0

DEC ‘16

WM8904

TABLE OF CONTENTS

DESCRIPTION ................................................................................................................ 1

FEATURES ..................................................................................................................... 1

APPLICATIONS.............................................................................................................. 1

BLOCK DIAGRAM ......................................................................................................... 2

TABLE OF CONTENTS .................................................................................................. 3

AUDIO SIGNAL PATHS DIAGRAM ............................................................................... 6

PIN CONFIGURATION ................................................................................................... 7

ORDERING INFORMATION ........................................................................................... 8

PIN DESCRIPTION ......................................................................................................... 9

ABSOLUTE MAXIMUM RATINGS ............................................................................... 10

RECOMMENDED OPERATING CONDITIONS ............................................................ 10

ELECTRICAL CHARACTERISTICS ............................................................................ 11

TERMINOLOGY ...................................................................................................................... 11

COMMON TEST CONDITIONS .............................................................................................. 11

INPUT SIGNAL PATH ............................................................................................................. 12

OUTPUT SIGNAL PATH ......................................................................................................... 16

BYPASS PATH ........................................................................................................................ 18

CHARGE PUMP ...................................................................................................................... 18

FLL .......................................................................................................................................... 18

OTHER PARAMETERS .......................................................................................................... 19

POWER CONSUMPTION ............................................................................................. 21

COMMON TEST CONDITIONS .............................................................................................. 21

POWER CONSUMPTION MEASUREMENTS ........................................................................ 21

SIGNAL TIMING REQUIREMENTS ............................................................................. 25

COMMON TEST CONDITIONS .............................................................................................. 25

MASTER CLOCK .................................................................................................................... 25

AUDIO INTERFACE TIMING .................................................................................................. 26

MASTER MODE ..........................................................................................................................................................................26

SLAVE MODE..............................................................................................................................................................................27

TDM MODE .................................................................................................................................................................................28

CONTROL INTERFACE TIMING ............................................................................................ 29

DIGITAL FILTER CHARACTERISTICS ....................................................................... 30

ADC FILTER RESPONSES .................................................................................................... 31

ADC HIGH PASS FILTER RESPONSES ................................................................................ 31

DAC FILTER RESPONSES .................................................................................................... 32

DE-EMPHASIS FILTER RESPONSES ................................................................................... 33

DEVICE DESCRIPTION ............................................................................................... 34

INTRODUCTION ..................................................................................................................... 34

ANALOGUE INPUT SIGNAL PATH ........................................................................................ 35

INPUT PGA ENABLE ..................................................................................................................................................................36

INPUT PGA CONFIGURATION...................................................................................................................................................36

SINGLE-ENDED INPUT ..............................................................................................................................................................38

DIFFERENTIAL LINE INPUT .......................................................................................................................................................38

DIFFERENTIAL MICROPHONE INPUT ......................................................................................................................................39

INPUT PGA GAIN CONTROL .....................................................................................................................................................39

INPUT PGA COMMON MODE AMPLIFIER ................................................................................................................................41

ELECTRET CONDENSER MICROPHONE INTERFACE ....................................................... 42

MICBIAS CONTROL ....................................................................................................................................................................42

Rev 4.0

WM8904

MICBIAS CURRENT DETECT ....................................................................................................................................................43

MICBIAS CURRENT DETECT FILTERING ................................................................................................................................43

MICROPHONE HOOK SWITCH DETECTION ............................................................................................................................45

DIGITAL MICROPHONE INTERFACE .................................................................................... 46

ANALOGUE-TO-DIGITAL CONVERTER (ADC) ..................................................................... 47

ADC DIGITAL VOLUME CONTROL ............................................................................................................................................48

HIGH PASS FILTER ....................................................................................................................................................................50

ADC OVERSAMPLING RATIO (OSR) ........................................................................................................................................51

DYNAMIC RANGE CONTROL (DRC) ..................................................................................... 51

COMPRESSION/LIMITING CAPABILITIES ................................................................................................................................52

GAIN LIMITS ................................................................................................................................................................................53

DYNAMIC CHARACTERISTICS .................................................................................................................................................54

ANTI-CLIP CONTROL .................................................................................................................................................................54

QUICK RELEASE CONTROL .....................................................................................................................................................55

GAIN SMOOTHING .....................................................................................................................................................................56

INITIALISATION ..........................................................................................................................................................................56

RETUNE

MOBILE PARAMETRIC EQUALIZER (EQ) .......................................................... 57

DEFAULT MODE (5-BAND PARAMETRIC EQ) .........................................................................................................................57

RETUNE

MOBILE MODE.........................................................................................................................................................58

EQ FILTER CHARACTERISTICS ...............................................................................................................................................58

DIGITAL MIXING ..................................................................................................................... 60

DIGITAL MIXING PATHS ............................................................................................................................................................60

DAC INTERFACE VOLUME BOOST ..........................................................................................................................................62

DIGITAL SIDETONE ....................................................................................................................................................................62

DIGITAL-TO-ANALOGUE CONVERTER (DAC) ..................................................................... 64

DAC DIGITAL VOLUME CONTROL ............................................................................................................................................64

DAC SOFT MUTE AND SOFT UN-MUTE ...................................................................................................................................66

DAC MONO MIX ..........................................................................................................................................................................67

DAC DE-EMPHASIS....................................................................................................................................................................67

DAC SLOPING STOPBAND FILTER ..........................................................................................................................................68

DAC OVERSAMPLING RATIO (OSR) ........................................................................................................................................68

OUTPUT SIGNAL PATH ......................................................................................................... 69

OUTPUT SIGNAL PATHS ENABLE ............................................................................................................................................70

HEADPHONE / LINE OUTPUT SIGNAL PATHS ENABLE .........................................................................................................70

OUTPUT MUX CONTROL ...........................................................................................................................................................73

OUTPUT VOLUME CONTROL....................................................................................................................................................74

ANALOGUE OUTPUTS ........................................................................................................... 76

HEADPHONE OUTPUTS – HPOUTL AND HPOUTR .................................................................................................................76

LINE OUTPUTS – LINEOUTL AND LINEOUTR..........................................................................................................................76

EXTERNAL COMPONENTS FOR GROUND REFERENCED OUTPUTS ..................................................................................77

REFERENCE VOLTAGES AND MASTER BIAS..................................................................... 77

ANALOGUE REFERENCE AND MASTER BIAS ........................................................................................................................77

LOW POWER PLAYBACK MODE ..............................................................................................................................................79

POP SUPPRESSION CONTROL ............................................................................................ 80

DISABLED INPUT CONTROL .....................................................................................................................................................80

CHARGE PUMP ...................................................................................................................... 80

DC SERVO .............................................................................................................................. 82

DC SERVO ENABLE AND START-UP .......................................................................................................................................82

DC SERVO ACTIVE MODES ......................................................................................................................................................85

DC SERVO READBACK .............................................................................................................................................................87

DIGITAL AUDIO INTERFACE ................................................................................................. 87

MASTER AND SLAVE MODE OPERATION ...............................................................................................................................87

OPERATION WITH TDM .............................................................................................................................................................88

BCLK FREQUENCY ....................................................................................................................................................................89

AUDIO DATA FORMATS (NORMAL MODE) ..............................................................................................................................89

Rev 4.0

WM8904

AUDIO DATA FORMATS (TDM MODE)......................................................................................................................................91

DIGITAL AUDIO INTERFACE CONTROL............................................................................... 93

AUDIO INTERFACE OUTPUT TRI-STATE .................................................................................................................................94

BCLK AND LRCLK CONTROL ....................................................................................................................................................94

COMPANDING ............................................................................................................................................................................95

LOOPBACK .................................................................................................................................................................................97

DIGITAL PULL-UP AND PULL-DOWN ........................................................................................................................................97

CLOCKING AND SAMPLE RATES ......................................................................................... 98

SYSCLK CONTROL ..................................................................................................................................................................100

CONTROL INTERFACE CLOCKING ........................................................................................................................................100

CLOCKING CONFIGURATION .................................................................................................................................................101

ADC / DAC CLOCK CONTROL .................................................................................................................................................102

OPCLK CONTROL ....................................................................................................................................................................102

TOCLK CONTROL ....................................................................................................................................................................103

ADC / DAC OPERATION AT 88.2K / 96K .................................................................................................................................103

FREQUENCY LOCKED LOOP (FLL) .................................................................................... 104

FREE-RUNNING FLL CLOCK ...................................................................................................................................................109

GPIO OUTPUTS FROM FLL .....................................................................................................................................................109

EXAMPLE FLL CALCULATION.................................................................................................................................................110

EXAMPLE FLL SETTINGS ........................................................................................................................................................111

GENERAL PURPOSE INPUT/OUTPUT (GPIO) ................................................................... 112

IRQ/GPIO1 .................................................................................................................................................................................112

GPIO2 ........................................................................................................................................................................................113

GPIO3 ........................................................................................................................................................................................113

BCLK/GPIO4 ..............................................................................................................................................................................114

INTERRUPTS ........................................................................................................................ 115

USING IN1L AND IN1R AS INTERRUPT INPUTS ....................................................................................................................119

CONTROL INTERFACE ........................................................................................................ 120

CONTROL WRITE SEQUENCER ......................................................................................... 122

INITIATING A SEQUENCE ........................................................................................................................................................122

PROGRAMMING A SEQUENCE ..............................................................................................................................................123

DEFAULT SEQUENCES ...........................................................................................................................................................126

START-UP SEQUENCE ............................................................................................................................................................126

SHUTDOWN SEQUENCE .........................................................................................................................................................128

POWER-ON RESET.............................................................................................................. 129

QUICK START-UP AND SHUTDOWN .................................................................................. 131

QUICK START-UP (DEFAULT SEQUENCE) ............................................................................................................................131

FAST START-UP FROM STANDBY .........................................................................................................................................132

QUICK SHUTDOWN (DEFAULT SEQUENCE).........................................................................................................................133

SOFTWARE RESET AND CHIP ID ....................................................................................... 133

REGISTER MAP ......................................................................................................... 134

APPLICATIONS INFORMATION ............................................................................... 177

RECOMMENDED EXTERNAL COMPONENTS ................................................................... 177

MIC DETECTION SEQUENCE USING MICBIAS CURRENT ............................................... 179

PACKAGE DIMENSIONS ........................................................................................... 181

IMPORTANT NOTICE ................................................................................................ 183

REVISION HISTORY .................................................................................................. 184

Rev 4.0

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