ZABG4002JA16TC datasheet, PDF - EEWORLD Datasheet

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ZABG4002JA16TC: CategoryPower/power management Professional power management (PMIC); File Size285KB，7 Pages; ManufacturerDiodes; Websitehttp://www.diodes.com/

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NOT RECOMMENDED FOR NEW DESIGN

USE

ZABG4003

ZABG4002

LOW POWER 4 STAGE FET LNA BIAS CONTROLLER

Summary

The ZABG4002 is a four stage depletion mode FET bias controller intended primarily for satellite Low Noise Block’s (LNB’s), but its also suitable

for other LNA applications such as those in found in PMR’s and microwave links. The ZABG4002 provides each FET with an independent

protected negative gate voltage and positive drain voltage with user programmable drain current. Combining an advanced IC process and

packaging techniques, the ZABG4002 helps minimise power consumption, component cost and PCB area whilst enhancing overall reliability.

Features



Four Stage FET Bias Controller

Operating Range of 3.0V to 8.0V

Low Quiescent Supply Current, 1.2mA Typical

FET Drain Voltages Set at 2.0V

FET Drain Current Selectable from 0 to 15mA

Switchable FETs for Power Management

Allows First and Second Stage FETs to Be Run at Different

(Optimum) Drain Currents

FET Drain Voltages and Currents Held Stable Over Temperature

and V

Variations

FETs Protected against Overstress during Power-up and Power-

down

Internal Negative Supply Generator Allowing Single Supply

Operation (Available for External Use)

Low External Component Count

Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)

Halogen and Antimony Free. “Green” Device (Note 3)

Pin Assignments

(Top View)

CAL1

GND

ZABG

4002

SUB

NB1

(Bottom View)

SUB

Applications



Twin LNB’s

Quad LNB’s

US LNB’s

Microwave Links

PMR and Cellular Telephone Systems

QFN1633

Notes:

1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant.

2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and

Lead-free.

3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and

<1000ppm antimony compounds.

Single Universal LNB System Diagram

Vertical

Gain stages

GaAs FET’s

Down

Converter

IF Switching, gain

and control

Horizontal

ZABG

4002

6002

ZXHF

5002

ZABG4002

Document number: DS32047 Rev. 3 - 3

1 of 7

www.diodes.com

CAL2

NB2

January 2019

NOT RECOMMENDED FOR NEW DESIGN

USE

ZABG4003

ZABG4002

Device Description

The ZABG series of devices are designed to meet the bias requirements of GaAs and HEMT FETs commonly used in satellite receiver LNBs with

a minimum of external components whilst operating from a minimal voltage supply and using minimal current.

The ZABG4002 provides four FET bias stages, arranged in two pairs of two. Resistors connected to pins R

CAL1

and R

CAL2

set the FET drain

currents of each pair over the range of 0 to 15mA, allowing input FETs to be biased for optimum noise and amplifier FETs for optimum gain.

Drain voltages of all stages are set at 2.0V. The drain supplies are current limited to approximately 5% above the operating currents set by the

CAL

resistors.

As an additional feature the R

CAL

pins can also be used as logic inputs to disable pairs of FETs as part of a power management scheme or simply

an alternative to LNA switching. Driven to a logic high (>3.0V), the inputs disable their associated FET bias stages by switching gate feeds to -2.5V

and drain feeds open circuit.

Depletion mode FETs require a negative voltage bias supply when operated in grounded source circuits. The ZABG4002 includes an integrated

low noise switched capacitor DC-DC converter generating a regulated output of -2.5V to allow single supply operation.

To facilitate the design of efficient low voltage 3.3V LNB systems and to maintain compatibility with higher voltage legacy designs, the ZABG4002

is capable of operating within the supply of 3.0V to 8V.

These devices are unconditionally stable over the full working temperature with the FETs in place, subject to the inclusion of the recommended

gate and drain capacitors. These ensure RF stability and minimal injected noise.

It is possible to use less than the devices full complement of FET bias controls, unused drain and gate connections can be left open circuit without

affecting operation of the remaining bias circuits.

To protect the external FETs the circuits have been designed to ensure that, under any conditions including power up/down transients, the gate

drive from the bias circuits cannot exceed -3V. Additionally each stage has its own individual current limiter. Furthermore if the negative rail

experiences a fault condition, such as overload or short circuit, the drain supply to the FETs will shut down avoiding excessive current flow.

To minimise PCB space ZABG4002 is packaged in the 16 pin 3mm x 3mm QFN1633 package.

Device operating temperature is -40° to +85° to suit a wide range of environmental conditions.

ZABG4002

Document number: DS32047 Rev. 3 - 3

2 of 7

www.diodes.com

January 2019

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