SY8983
32U
2 .5V Ultra-P
Precision 1 LVDS F
1:4
Fanout
Buff
fer/Transla
ator with In
nternal Ter
rmination
P
Precision E
Edge
®
Gen
neral Desc
cription
The SY89832U is a 2.5V, hig
s
gh-speed, 2G
GHz differential,
g
4
fer
low voltage differential swing (LVDS) 1:4 fanout buff
mized for ultr
ra-low skew applications. Within device
optim
skew is guarante
w
eed to be le
ess than 20p over supp
ps
ply
voltage and tempe
erature.
The differential input buffer has a unique intern
u
nal
termi
ination design that allows access to the termination
s
netw
work through a VT pin. This feature allow the device to
s
ws
y
o
gic
s.
AC
easily interface to different log standards A VREF–A
refere
ence output is included for AC-coupled applications.
s
r
The SY89832U is a part of Micrel's hig
f
gh-speed clo
ock
plications, see
synchronization family. For 3.3V app
9833L or SY8
89833AL. For applications that require a
s
e
SY89
differ
rent I/O com
mbination, co
onsult Micre
el's website at
www
w.micrel.com
and choose from a comprehensive
e
produ
uct line of high-speed, low-skew fanout buffers,
f
trans
slators and clo generator
ock
rs.
Datasheets and support docu
s
umentation ar available on
re
el’s
a
el.com.
Micre web site at:
www.micre
Featu
ures
Gu
uaranteed AC performance over tem
C
mperature and
d
vo
oltage:
put
DC-to >2.0GHz throughp
opagation dela (IN-to-Q)
ay
<570ps pro
<20ps withiin-device ske
ew
<200ps rise
e/fall time
81fs
RMS
pha jitter
ase
tra-low jitter d
design:
Ult
nique, patente input termination and V pin accepts
ed
VT
s
Un
DC and AC-co
C-
oupled inputs
Hig
gh-speed LVD outputs
DS
2.5 voltage su
5V
upply operatio
on
Ind
dustrial tempe
erature range –40C to +8
e:
85C
Av
vailable in a 16-pin (3mm × 3mm) QFN package
Appl
lications
Pr
rocessor clock distribution
k
ONET clock d
distribution
SO
Fib Channel c
bre
clock distribut
tion
Gi gabit Etherne clock distrib
et
bution
Fun
nctional Block Diag
gram
Typic Perform
cal
mance
Prec
cision Edge is a registered tradem
r
mark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Driv • San Jose, CA 95131 • USA • tel +1 (408) 94
ve
C
44-0800 • fax + 1 (408) 474-1000 •
http://www.m
0
micrel.com
Septe
ember 10, 20
014
Revision 3.0
tcghelp@micr
rel.com
or (40 955-1690
08)
Micrel, Inc.
SY89832U
Ordering Information
(1)
Part Number
SY89832UMG
SY89832UMG TR
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC Electricals only.
2. Tape and Reel.
(2)
Package Type
QFN-16
QFN-16
Operating Range
Industrial
Industrial
Package Marking
832U with Pb-Free bar line indicator
832U with Pb-Free bar line indicator
Lead Finish
NiPdAu
Pb-Free
NiPdAu
Pb-Free
Truth Table
IN
0
1
X
Note:
3. On next negative transition of the input signal (IN).
/IN
1
0
X
EN
1
1
0
Q
0
1
0
(3)
/Q
1
0
1
(3)
Pin Configuration
16-Pin QFN
September 10, 2014
2
Revision 3.0
tcghelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89832U
Pin Description
Pin Number
15, 16
1, 2
3, 4
5, 6
Pin Name
Q0, /Q0
Q1, /Q1
Q2, /Q2
Q3, /Q3
Pin Function
LVDS Differential (Outputs): Normally terminated with 100Ω across the pair (Q, /Q). See
LVDS
Outputs
section for more details.Unused outputs should be terminated with a 100Ω resistor across
each pair.
The single-ended, TTL/CMOS-compatible input functions as a synchronous output enable. The
synchronous enable ensures that enable/disable will only occur when the outputs are in a logic LOW
state. Note that this input is internally connected to a 25kΩ pull-up resistor and will default to logic
HIGH state (enabled) if left open.
Differential Inputs: These input pairs are the differential signal inputs to the device. Inputs accept AC-
or DC-Coupled differential signs as small as 100mV. Each pin of a pair internally terminates to a VT
pin through 50Ω. Note that these inputs will default to an intermediate state if left open. See
Input
Interface Applications
section for more details.
Reference Voltage: These outputs bias to VCC–1.4V. They are used when AC coupling the inputs
(IN, /IN). For AC-Coupled applications, connect VREF-AC to VT pin and bypass with 0.01μF low
ESR capacitor to VCC. See
Input Interface Applications
section for more details.
Maximum sink/source current is ±1.5mA. Due to the limited drive capability, each VREF-AC pin is
only intended to drive its respective VT pin.
Input Termination Center-Tap: Each side of the differential input pair terminates to a VT pin. The
VT pins provide a center-tap to a termination network for maximum interface flexibility. See
Input
Interface Applications
section for more details.
Ground. GND pins and exposed pad must be connected to the most negative potential of the device
ground.
Positive Power Supply: Bypass with 0.1μF//0.01μF low ESR capacitors and place as close to each
VCC pin as possible.
8
EN
9, 12
/IN, IN
10
VREF-AC
11
13
7, 14
VT
GND
VCC
September 10, 2014
3
Revision 3.0
tcghelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89832U
Absolute Maximum Ratings
(4)
Supply Voltage (V
CC
) ....................................
−0.5V
to +4.0V
Input Voltage (V
IN
). .................................
−0.5V
to V
CC
+0.3V
LVDS Output Current (I
OUT
) ....................................... ±10mA
Input Current
Source or Sink Current on (IN, /IN) .................... ±50mA
VREF-AC Current
Source or Sink Current on (I
VT
) ............................. ±2mA
Lead Temperature (soldering, 20s) ............................ 260°C
Storage Temperature (T
S
) .........................
−65°C
to +150°C
Operating Ratings
(5)
Supply Voltage Range (V
IN
) ................. +2.375V to +2.675V
Ambient Temperature (T
A
) .......................... –40°C to +85°C
(6)
Package Thermal Resistance
QFN
(θ
JA
) Still-Air ....................................................... 60°C/W
(Ψ
JB
) ................................................................... 32°C/W
DC Electrical Characteristics
(7)
T
A
= -40°C to +85°C, unless otherwise noted.
Symbol
V
CC
I
CC
R
IN
R
DIFF_IN
V
IH
V
IL
V
IN
V
DIFF_IN
|I
IN
|
V
REF-AC
Notes:
4.
Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential on the PCB.
ψ
JB
and
θ
JA
values are determined for a 4-layer board in still-air number, unless otherwise stated.
The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
Due to the internal termination the input current depends on the applied voltages at IN, /IN and VT inputs. Do not apply a combination of voltages
that causes the input current to exceed the maximum limit!
Parameter
Power Supply
Power Supply Current
Input Resistance (IN-to-VT)
Differential Input Resistance
(IN-to-/IN)
Input HIGH Voltage (IN, /IN)
Input LOW Voltage (IN, /IN)
Input Voltage Swing (IN, /IN)
Differential Input Voltage Swing
|IN – /IN|
Input Current (IN, /IN)
Output Reference Voltage
Condition
Min.
2.375
Typ.
2.5
75
Max.
2.625
100
55
110
V
CC
+0.3
V
IH
-0.1
V
CC
Units
V
mA
Ω
Ω
V
V
V
V
No load, maximum V
CC
.
45
90
0.1
−0.3
See
Figure 4.
See
Figure 5.
Note 8
V
CC
−
1.525
0.1
0.2
50
100
45
V
CC
−
1.425
V
CC
−
1.325
mA
V
5.
6.
7.
8.
September 10, 2014
4
Revision 3.0
tcghelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89832U
LVDS Outputs DC Electrical Characteristics
(7)
V
CC
= 2.5V ±5%, R
L
= 100Ω across the outputs; T
A
= –40°C to +85°C.
Symbol
V
OUT
V
DIFF_OUT
V
OCM
∆ V
OCM
Parameter
Output Voltage Swing
Differential Output Voltage Swing
Output Common Mode Voltage
Change in Common Mode Voltage
Condition
See
Figure 4.
See
Figure 5.
Min.
250
500
1.125
−50
Typ.
325
650
1.275
50
Max.
Units
mV
mV
V
mV
LVTTL/CMOS DC Electrical Characteristics
(7)
V
CC
= 2.5V ±5%, T
A
= –40°C to +85°C.
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Condition
Min.
2.0
0
−125
−300
Typ.
Max.
V
CC
0.8
30
Units
V
V
µA
µA
AC Electrical Characteristics
(9)
V
CC
= 2.5V ±5% or 3.3V ±10%, R
L
= 100Ω across the outputs; T
A
= –40°C to +85°C unless otherwise stated.
Symbol
f
MAX
t
pd
Parameter
Maximum Frequency
Propagation Delay
Within-Device Skew
Part-to-Part Skew
Set-Up Time
Hold Time
EN to IN, /IN
EN to IN, /IN
IN-to-Q
Condition
V
OUT
≥ 200mV
V
IN
< 400mV
V
IN
≥ 400mV
Note 10
Note 11
Note 12
Note 12
Carrier = 622MHz
Integration Range: 12kHz – 20MHz
Carrier = 250MHz
Integration Range: 12kHz – 20MHz
At full output swing.
70
300
500
81
195
150
200
Min.
2.0
370
300
Typ.
2.5
470
410
5
570
500
20
200
Max.
Units
GHz
ps
ps
ps
ps
ps
ps
fs
fs
ps
t
SKEW
t
S
t
H
t
JITTER
Additive Phase Jitter
t
r,
t
f
Notes:
9.
Output Rise/Fall Times
(20% to 80%)
High-frequency AC parameters are guaranteed by design and characterization.
10. Within device skew is measured between two different outputs under identical input transitions.
11. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the respective
inputs.
12. Set-up and hold times apply to synchronous applications that intend to enable/disable before the next clock cycle. For asynchronous applications,
set-up and hold times do not apply.
September 10, 2014
5
Revision 3.0
tcghelp@micrel.com
or (408) 955-1690
京公网安备 11010802033920号
EEWORLD
