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MC74HC244A
Octal 3-State Noninverting
Buffer/Line Driver/
Line Receiver
High−Performance Silicon−Gate CMOS
The MC74HC244A is identical in pinout to the LS244. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
This octal noninverting buffer/line driver/line receiver is designed
to be used with 3−state memory address drivers, clock drivers, and
other bus−oriented systems. The device has noninverting outputs and
two active−low output enables.
The HC244A is similar in function to the HC240A.
Features
http://onsemi.com
SOIC−20
DW SUFFIX
CASE 751D
TSSOP−20
DT SUFFIX
CASE 948E
PIN ASSIGNMENT
ENABLE A
A1
YB4
A2
YB3
A3
YB2
A4
YB1
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
ENABLE B
YA1
B4
YA2
B3
YA3
B2
YA4
B1
•
•
•
•
•
•
Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1
mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7 A
•
Chip Complexity: 136 FETs or 34 Equivalent Gates
•
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
•
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
LOGIC DIAGRAM
A1
A2
A3
A4
DATA
INPUTS
B1
B2
B3
B4
2
4
6
8
11
13
15
17
18
16
14
12
9
7
5
3
YA1
YA2
YA3
YA4
YB1
YB2
YB3
YB4
NONINVERTING
OUTPUTS
MARKING DIAGRAMS
20
HC244A
AWLYYWWG
1
SOIC−20
A
WL, L
YY, Y
WW, W
G or
G
1
TSSOP−20
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
20
HC
244A
ALYWG
G
(*Note: Microdot may be in either location)
FUNCTION TABLE
Inputs
Enable A,
Enable B
A, B
Outputs
YA, YB
L
H
Z
L
L
L
H
H
X
Z = high impedance
OUTPUT
ENABLES
1
ENABLE A
19
ENABLE B
PIN 20 = V
CC
PIN 10 = GND
ORDERING INFORMATION
See detailed ordering and shipping information in the package
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