TinyLogic UHS Dual Buffer
NC7WZ16
Description
The NC7WZ16 is a dual buffer from ON Semiconductor’s
Ultra−High Speed Series of TinyLogic. The device is fabricated with
advanced CMOS technology to achieve ultra−high speed with high
output drive while maintaining low static power dissipation over a
very broad V
CC
operating range. The device is specified to operate
over the 1.65 V to 5.5 V V
CC
range. The inputs and outputs are high
impedance when V
CC
is 0 V. Inputs tolerate voltages up to 5.5 V
independent of V
CC
operating voltage.
Features
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MARKING
DIAGRAMS
SIP6 1.45x1.0
CASE 127EB
Pin 1
UDFN6
1.0X1.0, 0.35P
CASE 517DP
Pin 1
6
SC−88
CASE 419B−02
1
C7, Z16
KK
XY
Z
M
G
= Specific Device Code
= 2−Digit Lot Run Traceability Code
= 2−Digit Date Code Format
= Assembly Plant Code
= Assembly Operation Month
= Pb−Free Package
Z16MG
G
C7KK
XYZ
•
•
•
•
•
•
•
•
•
•
Ultra−High Speed: t
PD
= 2.4 ns (Typical) into 50 pF at 5 V V
CC
High Output Drive:
±24
mA at 3 V V
CC
Broad V
CC
Operating Range: 1.65 V to 5.5 V
Matches Performance of LCX when Operated at 3.3 V V
CC
Power Down High−Impedance Inputs / Outputs
Over−Voltage Tolerance Inputs Facilitate 5 V to 3 V Translation
Proprietary Noise / EMI Reduction Circuitry
Ultra−Small MicroPak™ Packages
Space−Saving SC−88 Package
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
IEEC / IEC
A
1
A
2
1
1
Y
1
Y
2
C7KK
XYZ
Figure 1. Logic Symbol
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 6 of this data sheet.
©
Semiconductor Components Industries, LLC, 1999
February, 2021
−
Rev. 4
1
Publication Order Number:
NC7WZ16/D
NC7WZ16
Pin Configurations
A
1
1
GND 2
A
2
3
6
5
4
Y
1
V
CC
Y
2
A
1
1
GND 2
A
2
3
6 Y
1
5 V
CC
4 Y
2
Figure 2. SC−88 (Top View)
Figure 3. MicroPak (Top Through View)
(Top View)
AAA
Pin One
NOTES:
1. AAA represents product code top mark (see ordering table).
2. Orientation of Top Mark determines Pin One location. Read the
top product code mark left to right, Pin One is the lower left pin.
Figure 4. Pin 1 Orientation
PIN DEFINITIONS
Pin # SC−88
1
2
3
4
5
6
Pin # MicroPak
1
2
3
4
5
6
Name
A
1
GND
A
2
Y
2
V
CC
Y
1
Description
Input
Ground
Input
Output
Supply Voltage
Output
FUNCTION TABLE
(Y = A)
Inputs
A
L
H
H = HIGH Logic Level
L LOW Logic Level
Output
Y
L
H
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NC7WZ16
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
or I
GND
T
STG
T
J
T
L
P
D
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Source / Sink Current
DC V
CC
or Ground Current
Storage Temperature Range
Junction Temperature Under Bias
Junction Lead Temperature (Soldering, 10 Seconds)
Power Dissipation in Still Air
SC−88
MicroPak−6
MicroPak2™−6
ESD
Human Body Model, JEDEC: JESD22−A114
Charge Device Model, JEDEC: JESD22−C101
V
IN
< 0 V
V
OUT
< 0 V
Parameter
Min
−0.5
−0.5
−0.5
−
−
−
−
−65
−
−
−
−
−
−
−
Max
6.5
6.5
6.5
−50
−50
±50
±50
+150
+150
+260
332
812
812
4000
2000
V
Unit
V
V
V
mA
mA
mA
mA
°C
°C
°C
mW
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
V
OUT
t
r
, t
f
Parameter
Supply Voltage Operating
Supply Voltage Data Retention
Input Voltage
Output Voltage
Input Rise and Fall Times
V
CC
= 1.8 V, 2.5 V
±0.2
V
V
CC
= 3.3 V
±0.3
V
V
CC
= 5.5 V
±0.5
V
T
A
q
JA
Operating Temperature
Thermal Resistance
SC−88
MicroPak
MicroPak2
Conditions
Min
1.65
1.50
0
0
0
0
0
−40
−
−
−
Max
5.50
5.50
5.5
V
CC
20
10
5
+125
377
154
154
°C/W
°C
°C/W
V
V
ns/V
Unit
V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
3. Unused inputs must be held HIGH or LOW. They may not float.
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NC7WZ16
DC ELECTICAL CHARACTERISTICS
T
A
= 25°C
Symbol
V
IH
Parameter
HIGH Level
Control Input
Voltage
LOW Level
Control Input
Voltage
HIGH Level
Output Voltage
V
CC
(V)
1.65 to 1.95
2.3 to 5.5
1.65 to 1.95
2.3 to 5.5
1.65
1.80
2.30
3.00
4.50
1.65
2.30
3.00
3.00
4.50
V
OL
LOW Level
Output Voltage
1.65
1.80
2.30
3.00
4.50
1.65
2.30
3.00
3.00
4.50
I
IN
I
OFF
I
CC
Input Leakage
Current
Power Off
Leakage Current
Quiescent
Supply Current
1.65 to 5.5
0
1.65 to 5.50
I
OL
= 4 mA
I
OL
= 8 mA
I
OL
= 16 mA
I
OL
= 24 mA
I
OL
= 32 mA
0
≥
V
IN
≥
5.5 V
V
IN
or
V
OUT
= 5.5 V
V
IN
= 5.5 V, GND
V
IN
= V
IH
or V
IL
I
OH
=
−4
mA
I
OH
=
−8
mA
I
OH
=
−16
mA
I
OH
=
−24
mA
I
OH
=
−32
mA
I
OL
= 100
mA
V
IN
= V
IH
or V
IL
I
OH
=
−100
mA
Conditions
Min
0.65 V
CC
0.70 V
CC
−
−
1.55
1.70
2.20
2.90
4.40
1.29
1.90
2.40
2.30
3.80
−
−
−
−
−
−
−
−
−
−
−
−
−
Typ
−
−
−
−
1.65
1.80
2.30
3.00
4.50
1.52
2.14
2.75
2.62
4.13
0.00
0.00
0.00
0.00
0.00
0.08
0.10
0.16
0.24
0.25
−
−
−
Max
−
−
0.35 V
CC
0.30 V
CC
−
−
−
−
−
−
−
−
−
−
0.10
0.10
0.10
0.10
0.10
0.24
0.30
0.40
0.55
0.55
±0.1
1.0
1.0
T
A
=
−40
to 85°C
Min
0.65 V
CC
0.70 V
CC
−
−
1.55
1.70
2.20
2.90
4.40
1.21
1.90
2.40
2.30
3.80
−
−
−
−
−
−
−
−
−
−
−
−
−
Max
−
−
0.35 V
CC
0.30 V
CC
−
−
−
−
−
−
−
−
−
−
0.10
0.10
0.10
0.10
0.10
0.24
0.30
0.40
0.55
0.55
±1.0
10
10
mA
mA
mA
V
V
V
Unit
V
V
IL
V
OH
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NC7WZ16
AC ELECTRICAL CHARACTERISTICS
T
A
= 25°C
Symbol
t
PLH
, t
PHL
Parameter
Propagation Delay
(Figure 5, 6)
V
CC
(V)
1.65
1.80
2.50
±0.20
3.30
±0.30
5.00
±0.50
3.30
±0.30
5.00
±0.50
C
IN
C
PD
Input Capacitance
Power Dissipation Capacitance
(Note 4) (Figure 7)
0
3.30
5.00
C
L
= 50 pF,
R
L
= 500
W
Conditions
C
L
= 15 pF,
R
L
= 1 MW
Min
−
−
−
−
−
−
−
−
−
−
Typ
5.5
4.6
3.0
2.3
1.8
3.0
2.4
2.5
10
12
Max
9.6
8.0
5.2
3.6
2.9
4.6
3.8
−
−
−
T
A
=
−40
to 85°C
Min
−
−
−
−
−
−
−
−
−
−
Max
10.6
8.8
5.8
4.0
3.2
5.1
4.2
−
−
−
pF
pF
Unit
ns
4. C
PD
is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I
CCD
) at
no output loading and operating at 50% duty cycle. C
PD
is related to I
CCD
dynamic operating current by the expression:
I
CCD
= (C
PD
) (V
CC
) (f
IN
) + (I
CC
static).
V
CC
t
r
= 3 ns
90%
INPUT
INPUT
C
L
R
L
OUTPUT
10%
t
PHL
50%
50%
t
W
90%
50%
10%
t
PLH
50%
V
OL
GND
V
OH
t
f
= 3 ns
V
CC
NOTE:
5. C
L
includes load and stray capacitance;
inputs PRR = 1.0 MHz, t
W
= 500 ns.
OUTPUT
Figure 5. AC Test Circuit
V
CC
Figure 6. AC Waveforms
A
INPUT
NOTE:
6. Input = AC Waveform; t
r
= t
f
= 1.8 ns;
PRR = 10 MHz; Duty Cycle = 50%.
Figure 7. I
CCD
Test Circuit
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