SG3525A
Pulse Width Modulator
Control Circuit
The SG3525A pulse width modulator control circuit offers
improved performance and lower external parts count when
implemented for controlling all types of switching power supplies.
The on−chip +5.1 V reference is trimmed to
"1%
and the error
amplifier has an input common−mode voltage range that includes the
reference voltage, thus eliminating the need for external divider
resistors. A sync input to the oscillator enables multiple units to be
slaved or a single unit to be synchronized to an external system clock.
A wide range of deadtime can be programmed by a single resistor
connected between the C
T
and Discharge pins. This device also
features built−in soft−start circuitry, requiring only an external timing
capacitor. A shutdown pin controls both the soft−start circuitry and the
output stages, providing instantaneous turn off through the PWM latch
with pulsed shutdown, as well as soft−start recycle with longer
shutdown commands. The under voltage lockout inhibits the outputs
and the changing of the soft−start capacitor when V
CC
is below
nominal. The output stages are totem−pole design capable of sinking
and sourcing in excess of 200 mA. The output stage of the SG3525A
features NOR logic resulting in a low output for an off−state.
Features
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MARKING
DIAGRAMS
16
PDIP−16
N SUFFIX
CASE 648
16
1
16
16
SOIC−16L
DW SUFFIX
CASE 751G
1
1
1
SG3525AN
AWLYYWW
SG3525A
AWLYYWW
•
•
•
•
•
•
•
•
•
•
8.0 V to 35 V Operation
5.1 V
"
1.0% Trimmed Reference
100 Hz to 400 kHz Oscillator Range
Separate Oscillator Sync Pin
Adjustable Deadtime Control
Input Undervoltage Lockout
Latching PWM to Prevent Multiple Pulses
Pulse−by−Pulse Shutdown
Dual Source/Sink Outputs:
"400
mA Peak
Pb−Free Packages are Available*
A
WL
YY
WW
= Assembly Location
= Wafer Lot
= Year
= Work Week
PIN CONNECTIONS
Inv. Input
Noninv. Input
Sync
OSC. Output
C
T
R
T
Discharge
Soft−Start
1
2
3
4
5
6
7
8
(Top View)
16 V
ref
15 V
CC
14 Output B
13 V
C
12 Ground
11 Output A
10 Shutdown
9
Compensation
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2005
1
January, 2005 − Rev. 5
Publication Order Number:
SG3525A/D
SG3525A
16
V
ref
15
V
CC
12
Ground
OSC Output
Sync
RT
CT
Discharge
Compensation
INV. Input
2
Noninv. Input
8
C
Soft−Start
10
Shutdown
5.0k
5.0k
4
3
6
5
7
R
9
1
−
Error
Amp
+
+
− PWM
−
50mA
V
REF
S
Latch
S
Oscillator
F/F
Q
Q
NOR
Reference
Regulator
To Internal
Circuitry
Under−
Voltage
Lockout
NOR
VC
13
Output A
11
14
Output B
SG3525A Output Stage
Figure 1. Representative Block Diagram
ORDERING INFORMATION
Device
SG3525AN
SG3525ANG
SG3525ADW
SG3525ADWG
SG3525ADWR2
SG3525ADWR2G
Package
PDIP−16
PDIP−16
(Pb−Free)
SOIC−16L
SOIC−16L
(Pb−Free)
SOIC−16L
SOIC−16L
(Pb−Free)
Shipping
†
25 Units / Rail
25 Units / Rail
47 Units / Rail
47 Units / Rail
1000 Tape & Reel
1000 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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2
SG3525A
MAXIMUM RATINGS
Rating
Supply Voltage
Collector Supply Voltage
Logic Inputs
Analog Inputs
Output Current, Source or Sink
Reference Output Current
Oscillator Charging Current
Power Dissipation
T
A
= +25°C (Note 1)
T
C
= +25°C (Note 2)
Thermal Resistance, Junction−to−Air
Thermal Resistance, Junction−to−Case
Operating Junction Temperature
Storage Temperature Range
Lead Temperature (Soldering, 10 seconds)
P
D
1000
2000
R
qJA
R
qJC
T
J
T
stg
T
Solder
100
60
+150
−55 to +125
+300
°C/W
°C/W
°C
°C
°C
I
O
I
ref
Symbol
V
CC
V
C
Value
+40
+40
−0.3 to +5.5
−0.3 to V
CC
±500
50
5.0
Unit
Vdc
Vdc
V
V
mA
mA
mA
mW
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. Derate at 10 mW/°C for ambient temperatures above +50°C.
2. Derate at 16 mW/°C for case temperatures above +25°C.
RECOMMENDED OPERATING CONDITIONS
Characteristics
Supply Voltage
Collector Supply Voltage
Output Sink/Source Current
(Steady State)
(Peak)
Reference Load Current
Oscillator Frequency Range
Oscillator Timing Resistor
Oscillator Timing Capacitor
Deadtime Resistor Range
Operating Ambient Temperature Range
Symbol
V
CC
V
C
I
O
0
0
I
ref
f
osc
R
T
C
T
R
D
T
A
0
0.1
2.0
0.001
0
0
Min
8.0
4.5
Max
35
35
±100
±400
20
400
150
0.2
500
+70
mA
kHz
kW
mF
W
°C
Unit
Vdc
Vdc
mA
APPLICATION INFORMATION
Shutdown Options
(See Block Diagram, page 2)
Since both the compensation and soft−start terminals
(Pins 9 and 8) have current source pull−ups, either can
readily accept a pull−down signal which only has to sink a
maximum of 100
mA
to turn off the outputs. This is subject
to the added requirement of discharging whatever external
capacitance may be attached to these pins.
An alternate approach is the use of the shutdown circuitry
of Pin 10 which has been improved to enhance the available
shutdown options. Activating this circuit by applying a
positive signal on Pin 10 performs two functions: the PWM
latch is immediately set providing the fastest turn−off signal
to the outputs; and a 150
mA
current sink begins to discharge
the external soft−start capacitor. If the shutdown command
is short, the PWM signal is terminated without significant
discharge of the soft−start capacitor, thus, allowing, for
example, a convenient implementation of pulse−by−pulse
current limiting. Holding Pin 10 high for a longer duration,
however, will ultimately discharge this external capacitor,
recycling slow turn−on upon release.
Pin 10 should not be left floating as noise pickup could
conceivably interrupt normal operation.
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3
SG3525A
ELECTRICAL CHARACTERISTICS
(V
CC
= +20 Vdc, T
A
= T
low
to T
high
[Note 3], unless otherwise noted.)
Characteristics
REFERENCE SECTION
Reference Output Voltage (T
J
= +25°C)
Line Regulation (+8.0 V
≤
V
CC
≤
+35 V)
Load Regulation (0 mA
≤
I
L
≤
20 mA)
Temperature Stability
Total Output Variation Includes Line and Load Regulation over Temperature
Short Circuit Current (V
ref
= 0 V, T
J
= +25°C)
Output Noise Voltage (10 Hz
≤
f
≤
10 kHz, T
J
= +25°C)
Long Term Stability (T
J
= +125°C) (Note 4)
OSCILLATOR SECTION
(Note 5, unless otherwise noted.)
Initial Accuracy (T
J
= +25°C)
Frequency Stability with Voltage
(+8.0 V
≤
V
CC
≤
+35 V)
Frequency Stability with Temperature
Minimum Frequency (R
T
= 150 kW, C
T
= 0.2
mF)
Maximum Frequency (R
T
= 2.0 kW, C
T
= 1.0 nF)
Current Mirror (I
RT
= 2.0 mA)
Clock Amplitude
Clock Width (T
J
= +25°C)
Sync Threshold
Sync Input Current (Sync Voltage = +3.5 V)
ERROR AMPLIFIER SECTION
(V
CM
= +5.1 V)
Input Offset Voltage
Input Bias Current
Input Offset Current
DC Open Loop Gain (R
L
≥
10 MW)
Low Level Output Voltage
High Level Output Voltage
Common Mode Rejection Ratio (+1.5 V
≤
V
CM
≤
+5.2 V)
Power Supply Rejection Ratio (+8.0 V
≤
V
CC
≤
+35 V)
PWM COMPARATOR SECTION
Minimum Duty Cycle
Maximum Duty Cycle
Input Threshold, Zero Duty Cycle (Note 5)
Input Threshold, Maximum Duty Cycle (Note 5)
Input Bias Current
DC
min
DC
max
V
th
V
th
I
IB
−
45
0.6
−
−
−
49
0.9
3.3
0.05
0
−
−
3.6
1.0
%
%
V
V
mA
V
IO
I
IB
I
IO
A
VOL
V
OL
V
OH
CMRR
PSRR
−
−
−
60
−
3.8
60
50
2.0
1.0
−
75
0.2
5.6
75
60
10
10
1.0
−
0.5
−
−
−
mV
mA
mA
dB
V
V
dB
dB
Df
osc
DVCC
Df
osc
DT
f
min
f
max
−
−
−
−
400
1.7
3.0
0.3
1.2
−
±2.0
±1.0
±0.3
50
−
2.0
3.5
0.5
2.0
1.0
±6.0
±2.0
−
−
−
2.2
−
1.0
2.8
2.5
%
%
%
Hz
kHz
mA
V
ms
V
mA
V
ref
Reg
line
Reg
load
DV
ref
/DT
DV
ref
I
SC
V
n
S
5.00
−
−
−
4.95
−
−
−
5.10
10
20
20
−
80
40
20
5.20
20
50
−
5.25
100
200
50
Vdc
mV
mV
mV
Vdc
mA
mV
rms
mV/khr
Symbol
Min
Typ
Max
Unit
3. T
low
= 0°
T
high
= +70°C
4. Since long term stability cannot be measured on each device before shipment, this specification is an engineering estimate of average
stability from lot to lot.
5. Tested at f
osc
= 40 kHz (R
T
= 3.6 kW, C
T
= 0.01
mF,
R
D
= 0
W).
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4
SG3525A
ELECTRICAL CHARACTERISTICS
(continued)
Characteristics
SOFT−START SECTION
Soft−Start Current (V
shutdown
= 0 V)
Soft−Start Voltage (V
shutdown
= 2.0 V)
Shutdown Input Current (V
shutdown
= 2.5 V)
OUTPUT DRIVERS
(Each Output, V
CC
= +20 V)
Output Low Level
(I
sink
= 20 mA)
(I
sink
= 100 mA)
Output High Level
(I
source
= 20 mA)
(I
source
= 100 mA)
Under Voltage Lockout (V8 and V9 = High)
Collector Leakage, V
C
= +35 V (Note 6)
Rise Time (C
L
= 1.0 nF, T
J
= 25°C)
Fall Time (C
L
= 1.0 nF, T
J
= 25°C)
Shutdown Delay (V
DS
= +3.0 V, C
S
= 0, T
J
= +25°C)
Supply Current (V
CC
= +35 V)
6. Applies to SG3525A only, due to polarity of output pulses.
V
OL
−
−
V
OH
18
17
V
UL
I
C(leak)
t
r
t
f
t
ds
I
CC
6.0
−
−
−
−
−
19
18
7.0
−
100
50
0.2
14
−
−
8.0
200
600
300
0.5
20
V
mA
ns
ns
ms
mA
0.2
1.0
0.4
2.0
V
V
25
−
−
50
0.4
0.4
80
0.6
1.0
mA
V
mA
Symbol
Min
Typ
Max
Unit
V
ref
Clock
0.1
16
Reference Regulator
Flip/
Flop
O
s
c
i
l
l
a
t
o
r
15
0.1
V
CC
V
C
0.1
Out A
4
3.0k
PWM
ADJ.
Sync
3
1.0k
RT
6
Deadtime
1.5k
0.009
Ramp
100W
0.1
0.001
Comp
10k
1 = V
IO
2 = 1(+)
3 = 1(−)
1
2
−
V/I Meter
+
3
1
2
3
1
2
3
0.01
9
7
5
13
A
11
1.0k, 1.0W
(2)
B
14
Out B
PWM
50mA
12
GND
Softstart
+
5.0mF
1
2
3
1
2
−
E/A
+
5.0k
5.0k
8
10
2.0k
V
ref
DUT
Shutdown
Figure 2. Lab Test Fixture
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