Datasheet
36V Stepping Motor Driver
BD63610AEFV
●General Description
BD63610AEFV is a bipolar low-consumption driver that
driven by PWM current. Rated power supply voltage of
the device is 36 V, and rated output current is 0.8A.
CLK-IN driving mode is adopted for input interface, and
excitation mode is corresponding to FULL STEP mode,
HALF STEP mode. In addition, the power supply may
be driven by one single system, which simplifies the
design.
● Features
■
Rated output current（DC）0.8A
■
Low ON resistance DMOS output
■
CLK-IN drive mode
■
PWM constant current (other oscillation)
Built-in spike noise cancel function (external noise
filter is unnecessary)
■
Full, half step functionality
■
Freely timing excitation mode switch
■
Normal rotation & reverse rotation switching
function
■
Power save function
■
Built-in logic input pull-down resistor
■
Power-on reset function
■
Thermal shutdown circuit (TSD)
■
Over-current protection circuit（OCP）
■
Under voltage lock out circuit (UVLO)
■
Over voltage lock out circuit (OVLO)
■
Ghost Supply Prevention (protects against
malfunction when power supply is disconnected)
■
Microminiature, ultra-thin and high heat-radiation
(exposed metal type) package
● Application
■
PPC, multi-function printer, laser beam printer, and
ink-jet printer
■
Monitoring camera and WEB camera
■
Sewing machine
■
Photo printer, FAX, scanner and mini printer
■
Toy and robot
● Major Characteristics
■
Range of power supply voltage
19½28 [V]
■
Rated output current
0.8 [A]
■
Rated output current (peak)
1.0 [A]
■
Range of operating temperature
-25½+85 [℃]
■
Output ON resistance (total of upper 1.8 [Ω] (Typ.)
and lower resistors)
●Package
W(Typ.) x D(Typ.)x H(Max.)
HTSSOP-B20
6.50mm x 6.40mm x 1.00mm
●
Basic application circuit
7
GND
CLK
10
CW_CCW
12
MODE
13
ENABLE
15
14
16
TEST1
GND
9
PS
5
4
2
3
VCC1
OUT1A
OUT1B
RNF1
VREF
8
17
VCC2
OUT2A
OUT2B
RNF2
CR
6
18
20
19
TEST0
11
1
GND
Figure 1. BD63610AEFV application circuit diagram
○Product
structure：silicon monolithic integrated circuit
○
It is not the radiation-proof design for this product.
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BD63610AEFV
●
Terminals Configuration Diagram
[TOP VIEW]
GND
OUT1B
RNF1
OUT1A
VCC1
CR
GND
VREF
PS
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
OUT2B
RNF2
OUT2A
VCC2
VREF
8
CLK
10
CW_CCW
12
MODE
13
ENABLE
15
TSD
OVLO
Translator
RESET
OCP
UVLO
● Block Diagram
7
GND
14
TEST1
16
GND
9
PS
GND
ENABLE
＋
－
2bit DAC
5
VCC1
＋
4
2
3
OUT1A
OUT1B
RNF1
RNF1S
－
TEST1
＋
Blank time
PWM control
CR
6
OSC
Predriver
MODE
CW_CCW
TEST0
TEST0
Control logic
RNF2S
－
17
18
20
19
VCC2
OUT2A
OUT2B
RNF2
CLK 10
11
Regulator
1
GND
Figure 2. Terminals
Configuration Diagram
Figure 3. BD63610AEFV Block Diagram
● Descriptions on Terminals
NO.
1
2
3
4
5
6
7
8
9
10
Designation
GND
OUT1B
RNF1
OUT1A
VCC1
CR
GND
VREF
PS
CLK
Function
Ground terminal
H bridge output terminal
Connection terminal of resistor for
output current detection
H bridge output terminal
Power supply terminal
Connection terminal of CR for setting
Ground terminal
Output current value setting terminal
Power save terminal
Clock input terminal for advancing the
NO.
11
12
13
14
15
16
17
18
19
20
Designation
TEST0
CW_CCW
MODE
TEST1
ENABLE
GND
VCC2
OUT2A
RNF2
OUT2B
Function
Terminal for testing
(used by connecting with GND)
Motor rotating
terminal
Motor excitation
terminal
Motor excitation
terminal
Grounding terminal
Non connection
Power supply terminal
Non connection
H bridge output terminal
direction
mode
mode
setting
setting
setting
Terminal for enabling output
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BD63610AEFV
● Absolute Maximum Rated Values (Ta=25℃)
Item
Supply voltage
Symbol
V
CC1,2
Rated Value
-0.2½+36.0
1.00
※
Power dissipation
Pd
3.20
※
Input voltage for control pin
RNF maximum voltage
Maximum output current (DC)
Maximum output current (peak)
Operating temperature range
Storage temperature range
V
IN
V
RNF
I
OUT
I
OUT
T
opr
T
stg
2
1
Unit
V
W
W
V
V
-0.2½+5.5
0.7
0.8
※
1.0
※
3
A/Phase
A/Phase
℃
℃
4
-25½+85
-55½+150
※1
70mm×70mm×1.6mm glass epoxy board. Derating in done at 8.8mW/℃ for operating above Ta=25℃.
※2
4-layer recommended board. Derating in done at 32.0mW/℃ for operating above Ta=25℃.
※3
Do not, however exceed Pd, ASO and Tjmax=150℃.
※4
pulth width tw≦1ms,duty20%
Caution:
Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
●Recommended operating range (Ta= -25½+85℃)
Item
Supply voltage
Maximum Output current (DC)
*5
Not exceeding Pd，ASO or Tj=150℃
Symbol
V
CC1,2
I
OUT
Rated Value
19½28
0.6
※
5
Unit
V
A/ Phase
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BD63610AEFV
●Electrical Characteristics (Unless otherwise specified Ta=25℃, V
CC1,2
=24V)
Specification
Item
Symbol
Minimum Standard Maximum
[Whole]
Circuit current at standby
Circuit current
[Control input] (CLK)
H-level input voltage
L-level input voltage
Input hysteresis voltage
H-level input current
L-level input current
V
IN1H
V
IN1L
V
IN1HYS
I
IN1H
I
IN1L
2.8
-
-
35
-10
-
-
0.85
50
0
-
0.6
-
100
-
V
V
V
µA
µA
V
IN1
=5V
V
IN1
=0V
I
CCST
I
CC
-
-
0.4
1.3
1.5
4.0
mA
mA
PS=L
PS=H, VREF=3V
Unit
Condition
[Control input] (CW_CCW, MODE, ENABLE, PS)
H-level input voltage
L-level input voltage
H-level input current
L-level input current
V
IN2H
V
IN2L
I
IN2H
I
IN2L
2.0
-
35
-10
-
-
50
0
-
0.8
100
-
V
V
µA
µA
V
IN2
=5V
V
IN2
=0V
[Output (OUT1A, OUT1B, OUT2A, OUT2B)]
Output ON resistance
Output leak current
[Current control]
RNFx input current
VREF input current
VREF input voltage range
MTH input current
MTH input voltage range
Minimum ON time
(Blank time)
Comparator threshold
I
RNF
I
VREF
V
VREF
I
MTH
V
MTH
t
ONMIN
V
CTH
-80
-2.0
0
-2.0
0
0.3
0.57
-40
-0.1
-
-0.1
-
0.9
0.60
-
-
3.0
-
3.5
1.5
0.63
µA
µA
V
µA
V
µs
V
C=1000pF, R=39kΩ
VREF=3V
MTH=0V
RNFx=0V
VREF=0V
R
ON
I
LEAK
-
-
1.8
-
2.4
10
Ω
µA
I
OUT
=±0.5A
(Sum of upper and lower)
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BD63610AEFV
●Function explanation
○CLK／Clock input terminal for advancing the electrical angle
CLK is reflected at rising edge. The Electrical angle advances by one for each CLK input.
Motor’s misstep will occur if noise is picked up at the CLK terminal, so please design the pattern in such a way that there is
no noise plunging.
○MODE／Motor Excitation Mode Setting Terminal
Set the motor excitation mode
MODE0
Excitation Mode
L
FULL STEP
H
HALF STEP
Please refer to the P.12, 13 for the timing chart & motor torque vector of various excitation modes.
Unrelated to CLK, change in setting is forcibly reflected (refer to P.15).
○CW_CCW Terminal／Motor rotating direction setting
Set the motor’s rotating direction. Change in setting is reflected at the CLK rising edge immediately after the change in
setting (refer to P.14)
CW_CCW
Rotating direction
L
H
Clockwise (CH2’s current is outputted with a phase lag of 90°in regard to CH1’s current)
Counter Clockwise(CH2’s current is outputted with a phase lead of 90°in regard to CH1’s
current)
○ENABLE Terminal／Output enable terminal
Turn off forcibly all the output transistors (motor output is open).
When ENABLE=L, input to CLK is blocked, and phase advance operation of internal translator circuit is stopped.
However, during excitation modes (MODE0,MODE1) switch within the interval of ENABLE=L, as ENABLE=L→H is reset,
the new mode upon switch will be applied for excitation (See P.15).
ENABLE
Motor Output
L
H
OPEN (electrical angle maintained)
ACTIVE
○PS／Power save terminal
PS can make circuit standby state and make motor output OPEN. In standby state, translator circuit is reset (initialized) and
electrical angle is initialized.
Please be careful because there is a delay of 40μs(max.) before it is returned from standby state to normal state and the
motor output becomes ACTIVE (refer to P.11).
PS
Status
L
Standby state(RESET)
H
ACTIVE
The electrical angle (initial electrical angle) of each excitation mode immediately after RESET is as follows
(refer to P.12, 13).
Excitation Mode
Initial Electrical Angle
FULL STEP
HALFSTEP
45°
45°
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