STM32F103RCT6 datasheet, PDF - EEWORLD Datasheet

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STM32F103RCT6: DescriptionMCU 32-bit ARM Cortex M3 RISC 256KB Flash 2.5V/3.3V 64-Pin LQFP Tray; CategoryThe embedded processor and controller Microcontrollers and processors; File Size2MB，143 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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STM32F103RCT6 Overview

MCU 32-bit ARM Cortex M3 RISC 256KB Flash 2.5V/3.3V 64-Pin LQFP Tray

STM32F103RCT6 Parametric

Parameter Name	Attribute value
Brand Name	STMicroelectronics
Maker	STMicroelectronics
Parts packaging code	QFP
package instruction	LFQFP, QFP64,.47SQ,20
Contacts	64
Reach Compliance Code	compliant
ECCN code	3A991.A.2
Factory Lead Time	14 weeks
Has ADC	YES
Address bus width
bit size	32
CPU series	CORTEX-M3
maximum clock frequency	16 MHz
DAC channel	YES
DMA channel	YES
External data bus width
JESD-30 code	S-PQFP-G64
JESD-609 code	e4
length	10 mm
Humidity sensitivity level	3
Number of I/O lines	51
Number of terminals	64
On-chip program ROM width	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Encapsulate equivalent code	QFP64,.47SQ,20
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2.5/3.3 V
Certification status	Not Qualified
RAM (bytes)	49152
rom(word)	262144
ROM programmability	FLASH
Maximum seat height	1.6 mm
speed	72 MHz
Maximum slew rate	70 mA
Maximum supply voltage	3.6 V
Minimum supply voltage	2 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	10 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER, RISC
Base Number Matches	1

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STM32F103xC, STM32F103xD,

STM32F103xE

High-density performance line Arm

-based 32-bit MCU with 256 to 512KB

Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces

Datasheet

−

production data

Features

•

Core: Arm

32-bit Cortex

-M3 CPU

–

72 MHz maximum frequency, 1.25 DMIPS/MHz

(Dhrystone 2.1) performance at 0 wait state

memory access

Single-cycle multiplication and hardware

division

256 to 512 Kbytes of Flash memory

up to 64 Kbytes of SRAM

Flexible static memory controller with 4 Chip

Select. Supports Compact Flash, SRAM,

PSRAM, NOR and NAND memories

LCD parallel interface, 8080/6800 modes

2.0 to 3.6 V application supply and I/Os

POR, PDR, and programmable voltage detector

(PVD)

4-to-16 MHz crystal oscillator

Internal 8 MHz factory-trimmed RC

Internal 40 kHz RC with calibration

32 kHz oscillator for RTC with calibration

Sleep, Stop and Standby modes

BAT

supply for RTC and backup registers

LQFP64 10 × 10 mm,

LQFP100 14 × 14 mm,

LQFP144 20 × 20 mm

WLCSP64

LFBGA100 10 × 10 mm

LFBGA144 10 × 10 mm

–

•

Up to 11 timers

–

Up to four 16-bit timers, each with up to 4

IC/OC/PWM or pulse counter and quadrature

(incremental) encoder input

2 × 16-bit motor control PWM timers with dead-

time generation and emergency stop

2 × watchdog timers (Independent and Window)

SysTick timer: a 24-bit downcounter

2 × 16-bit basic timers to drive the DAC

Up to 2 × I

C interfaces (SMBus/PMBus)

Up to 5 USARTs (ISO 7816 interface, LIN, IrDA

capability, modem control)

Up to 3 SPIs (18 Mbit/s), 2 with I

S interface

multiplexed

CAN interface (2.0B Active)

USB 2.0 full speed interface

SDIO interface

•

Memories

–

•

Clock, reset and supply management

•

Up to 13 communication interfaces

•

Low power

•

CRC calculation unit, 96-bit unique ID

•

ECOPACK

packages

Table 1.Device summary

Reference

STM32F103xC

STM32F103xD

STM32F103xE

Part number

STM32F103RC STM32F103VC

STM32F103ZC

STM32F103RD STM32F103VD

STM32F103ZD

STM32F103RE STM32F103ZE

STM32F103VE

•

3 × 12-bit, 1 µs A/D converters (up to 21

channels)

–

Conversion range: 0 to 3.6 V

Triple-sample and hold capability

Temperature sensor

•

2 × 12-bit D/A converters

•

DMA: 12-channel DMA controller

–

Supported peripherals: timers, ADCs, DAC,

SDIO, I

Ss, SPIs, I

Cs and USARTs

Serial wire debug (SWD) & JTAG interfaces

Cortex

-M3 Embedded Trace Macrocell™

51/80/112 I/Os, all mappable on 16 external

interrupt vectors and almost all 5 V-tolerant

•

Debug mode

–

•

Up to 112 fast I/O ports

July 2018

DS5792 Rev 13

1/143

www.st.com

Contents

STM32F103xC, STM32F103xD, STM32F103xE

Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.1

2.2

2.3

Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Full compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.3.1

2.3.2

2.3.3

2.3.4

2.3.5

2.3.6

2.3.7

2.3.8

2.3.9

2.3.10

2.3.11

2.3.12

2.3.13

2.3.14

2.3.15

2.3.16

2.3.17

2.3.18

2.3.19

2.3.20

2.3.21

2.3.22

2.3.23

2.3.24

2.3.25

2.3.26

2.3.27

2.3.28

Arm

Cortex

-M3 core with embedded Flash and SRAM . . . . . . . . . . 15

Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . 15

Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

FSMC (flexible static memory controller) . . . . . . . . . . . . . . . . . . . . . . . . 15

LCD parallel interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 16

External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . 16

Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

RTC (real-time clock) and backup registers . . . . . . . . . . . . . . . . . . . . . . 18

Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

I²C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Universal synchronous/asynchronous receiver transmitters (USARTs) 21

Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Inter-integrated sound (I

S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

SDIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Controller area network (CAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Universal serial bus (USB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

GPIOs (general-purpose inputs/outputs) . . . . . . . . . . . . . . . . . . . . . . . . 22

ADC (analog to digital converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

DAC (digital-to-analog converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

2/143

DS5792 Rev 13

STM32F103xC, STM32F103xD, STM32F103xE

2.3.29

2.3.30

Contents

Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 24

Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Pinouts and pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

5.1

Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

5.1.1

5.1.2

5.1.3

5.1.4

5.1.5

5.1.6

5.1.7

Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

5.2

5.3

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

5.3.1

5.3.2

5.3.3

5.3.4

5.3.5

5.3.6

5.3.7

5.3.8

5.3.9

5.3.10

5.3.11

5.3.12

5.3.13

5.3.14

5.3.15

5.3.16

5.3.17

5.3.18

5.3.19

General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . 45

Embedded reset and power control block characteristics . . . . . . . . . . . 45

Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

FSMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . . 87

I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

CAN (controller area network) interface . . . . . . . . . . . . . . . . . . . . . . . . 106

12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

DS5792 Rev 13

3/143

STM32F103xC, STM32F103xD, STM32F103xE

List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Table 14.

Table 15.

Table 16.

Table 17.

Table 18.

Table 19.

Table 20.

Table 21.

Table 22.

Table 23.

Table 24.

Table 25.

Table 26.

Table 27.

Table 28.

Table 29.

Table 30.

Table 31.

Table 32.

Table 33.

Table 34.

Table 35.

Table 36.

Table 37.

Table 38.

Table 39.

Table 40.

Table 41.

Table 42.

Table 43.

Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

STM32F103xC, STM32F103xD and STM32F103xE features

and peripheral counts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

STM32F103xx family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

High-density timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

High-density STM32F103xC/D/E pin definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

FSMC pin definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 45

Embedded internal reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Maximum current consumption in Run mode, code with data processing

running from Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Maximum current consumption in Run mode, code with data processing

running from RAM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Maximum current consumption in Sleep mode, code running from Flash or RAM. . . . . . . 49

Typical and maximum current consumptions in Stop and Standby modes . . . . . . . . . . . . 50

Typical current consumption in Run mode, code with data processing

running from Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Typical current consumption in Sleep mode, code running from Flash or

RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

HSE 4-16 MHz oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

LSE oscillator characteristics (f

LSE

= 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

HSI oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

Flash memory endurance and data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings . . . . . . . . . . . . . . . . . . 67

Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings . . . . . . . . . . . . . . . . . . 68

Asynchronous multiplexed PSRAM/NOR read timings. . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

Asynchronous multiplexed PSRAM/NOR write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

Synchronous multiplexed NOR/PSRAM read timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Synchronous multiplexed PSRAM write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Synchronous non-multiplexed NOR/PSRAM read timings . . . . . . . . . . . . . . . . . . . . . . . . . 75

Synchronous non-multiplexed PSRAM write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Switching characteristics for PC Card/CF read and write cycles . . . . . . . . . . . . . . . . . . . . 81

Switching characteristics for NAND Flash read and write cycles . . . . . . . . . . . . . . . . . . . . 85

EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

EMI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

ESD absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

DS5792 Rev 13

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This is an idea of ADC, let’s see if it can be realized.: Known conditions:1. I use the internal ADC of stm32f103vct6, and connect an external SPI FLASH M25P64 for data storage;2. My purpose is to do continuous ADC conversion and save, and the ADC conversion...; zxd10000 stm32/stm8

Special application for board trial: Most of the company's projects require the use of FPGA and CPLD. Recently, a project requires a higher-end FPGA, so I want to apply for a trial first. The new project requirements will be carried out ...; zqs0394 FPGA/CPLD

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