designed for Wi-Fi 802.11a/n/ac systems. The compact form
factor and integrated matching minimizes layout area in the
application.
Performance is focused on optimizing the PA for PoE
applications by centering on 0.5W power consumption while
maintaining the highest linear output power and leading edge
throughput.
Integrated die level filtering for 2nd and 3rd harmonics as well
as 2.4 GHz rejection for DBDC operation are included.
The QPF4538 integrates a 5 GHz power amplifier (PA), single
pole two throw switch (SP2T) and bypassable low noise
amplifier (LNA) into a single device.
16-Pin, 2.5x2.5 mm Module Package
Key Features
4900 – 5925 MHz
P
OUT
= +17.5dBm MCS9 VHT80 -35dB Dynamic EVM
P
OUT
= +18.5dBm MCS7 HT20/40 -30dB Dynamic EVM
P
OUT
= +21dBm MCS0 HT20 Spectral Mask Compliance
160MHz Bandwidth and MCS11 Capable
Optimized for +3.3 V Operation
Low Power Consumption ~ 0.5W
30 dB Tx Gain
2.5 dB Noise Figure
14.5 dB Rx Gain & 6 dB Bypass Loss
15 dB 2.4 GHz Rejection on Rx Path
Integrated DC Power Detector
Functional Block Diagram
Applications
Access Points
Wireless Routers
Residential Gateways
Set-Top Boxes
Customer Premise Equipment
Internet of Things
Ordering Information
Top View
Part Number
QPF4538SB
QPF4538SQ
QPF4538SR
QPF4538TR7
QPF4538TR13
QPF4538PCK-01
Description
Sample bag with 5 pieces
Sample bag with 25 pieces
7” reel with 100 pieces
7” reel with 2,500 pieces
13” reel with 10,000 pieces
Assembled Evaluation Board + 5 pcs
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QPF4538
Wi-Fi Front End Module
Absolute Maximum Ratings
Parameter
DC Supply Voltage
Control Voltage
Storage Temperature
Junction Temperature
RF Input Power at TX_IN
RF Input Power at ANT
RF Input Power at ANT
MTTF > 1.5x10
6
hours
MTTF > 1.0x10
6
hours
Into 50 Ω Load for 802.11a/n/ac (No
Damage), Transmit Mode
(No Damage), Receive LNA On Mode
(No Damage), Receive Bypass Mode
Conditions
Rating
-0.5 to +6 V
-0.5 to +6 V
-40 to 150 °C
160 °C
170 °C
+10 dBm
+10 dBm
+25 dBm
Exceeding any one or a combination of the Absolute Maximum Rating conditions may cause permanent damage to the device. Extended application of Absolute Maximum
Rating conditions to the device may reduce device reliability. This is an InGaP device designed for high duty cycle applications with Tj>30 °C over ambient.
Recommended Operating Conditions
Parameter
Operating Frequency
Extended Operating Frequency
Device Voltage (V
CC
& V
DD
)
Control Voltage – High
(PA_EN, LNA_EN & C_RX)
Control Voltage – Low
(PA_EN, LNA_EN & C_RX)
T
OPERATING
*
Min.
5180
4900
+3
+2.8
0
-40
+3.3
+3.1
Typ.
Max.
5925
5925
+3.6
V
CC
+0.2
+85
Units
MHz
MHz
V
V
V
°C
Electrical specifications are measured at specified test conditions. Specifications are not guaranteed over all recommended operating conditions. * T
OPERATING
is temperature at
package ground.
Electrical Specifications
Parameter
Transmit (TX-ANT) Mode
11ac VHT80 Output Power
Dynamic EVM
11ac VHT160 Output Power
11ac VHT80 Output Power
Dynamic EVM
11n HT20/40 Output Power
Dynamic EVM
Margin to VHT80 Spectral Mask
Margin to VHT20 Spectral Mask
Gain
Gain Flatness
Conditions
Min.
Typ.
Max.
Units
Unless otherwise noted: V
CC
=3.3V, T=+25ºC, PA_EN=High, LNA_EN=Low, C_RX=Low
MCS11 1024QAM
MCS9 256QAM
MCS9 256QAM
MCS7 64QAM
P
OUT
= +19 dBm, 11ac MCS0
P
OUT
= +21 dBm, 11n MCS0
Across any 80 MHz Channel
29
-0.25
16.5
17.5
15
-40
16
-35
17.5
-35
18.5
3
3
30
+0.25
-30
0
0
dBm
dB
dBm
dB
dBm
dB
dBm
dB
dBc
dBc
dB
dB
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QPF4538
Wi-Fi Front End Module
Parameter
Out of Band Gain
TX Port Return Loss
ANT Port Return Loss
Quiescent Current
Operating Current
2
nd
Harmonics
3
rd
Harmonics
ANT-RX Isolation
RF Off
DC Power Detect Voltage
RECEIVE (ANT-RX) LNA ON MODE
Gain
Gain Flatness Across any 80 MHz
Channel
Out of Band Gain
Noise Figure
RX Port Return Loss
ANT Port Return Loss
Input P
1dB
Input IP3
Rx Operating Current
RECEIVE (ANT-RX) BYPASS MODE
Bypass Loss
Loss Flatness Across any 80 MHz
Channel
Out of Band Gain
RX Port Return Loss
ANT Port Return Loss
Input P
1dB
Input IP3
GENERAL SPECIFICATIONS
FEM Leakage Current
PA_EN Control Current - High
LNA_EN Control Current - High
C_RX Control Current - High
TX Output P
1dB
Ramp ON/OFF Time
PA Stability - Output VSWR
Output Power Range
Thermal Resistance, θ
jc
Junction to case, MCS0 P
OUT
CW
10<->90% Ref from Control Voltage to RF
Power
CW No Spurious above -41.25dBm/MHz
0
60
f
= 2400-2500 MHz
10
10
+18
-0.25
-20
20
14
+20
6
4
-7
f
= 2400-2500 MHz
P
OUT
= +17.5 dBm
RF Off
P
OUT
= +17.5 dBm
P
OUT
= +21 dBm
P
OUT
= +21 dBm 802.11a 6 MBps
P
OUT
= +21 dBm 802.11a 6 MBps
35
0.21
0.45
Conditions
f
= 1600-1950MHz
f
= 3300-3800MHz
f
> 7000MHz
6
8
12
15
90
155
200
-35
-45
100
180
220
-30
-40
Min.
Typ.
Max.
-30
-5
10
Units
dB
dB
dB
dB
dB
mA
mA
mA
dBm/MHz
dBm/MHz
dB
V
V
P
OUT
= +21dBm
0.60
V
Unless otherwise noted: V
CC
=3.3V, T=+25ºC, PA_EN=Low, LNA_EN=High, C_RX=High
12
-0.25
-15
2.5
10
5
-5
+2
14.5
+0.25
-12
3
dB
dB
dB
dB
dB
dB
dBm
dBm
15
20
mA
Unless otherwise noted: V
CC
=3.3V, T=+25ºC, PA_EN=Low, LNA_EN=Low, C_RX=High
6
9
+0.25
-15
dB
dB
dB
dB
dB
dBm
dBm
150
2
225
15
µA
µA
µA
µA
dBm
nS
+25
Unless otherwise noted: V
CC
=3.3V, T=+25ºC
70
0.2
160
10
+27
200
4:1
25
dBm
°C/W
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QPF4538
Wi-Fi Front End Module
Logic Truth Table
Mode
Standby
Transmit
LNA On
Bypass
PA_EN
Low
High
Low
Low
LNA_EN
Low
Low
High
Low
C_RX
Low
Low
High
High
Evaluation Board Schematic and Layout
Bill of Material
Ref. Des.
-
U1
C5
C2
C1, C3
C11
C6
C9, C10
Value
-
-
1 µF
4.7 µF
1 nF
10 pF
33 pF
-
Description
Printed Circuit Board
5GHz Wi-Fi Front End Module
Capacitor, Chip, 10%, 6.3V, X5R, 0402
Capacitor, Chip, 10%, 16V, STD, 0805
Capacitor, Chip, 10%, 25V, X7R, 0201
Capacitor, Chip, +/-0.5pF, 25V, C0G, 0201
Capacitor, Chip, 5%, 25V, C0G, 0201
Do Not Install
Manuf.
Qorvo
Taiyo Yuden
AVX/Kyocera
Part number
QPF4538
JMK105BJ105KV-F
0805YC475KAT2A
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ADVANCED
QPF4538
Wi-Fi Front End Module
Pin Configuration and Description
Top View
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Backside
Paddle
Label
GND
RX
GND
VDD
PDET
PA_EN
NC
TX
NC
VCC
VCC
GND
ANT
GND
C_RX
LNA_EN
GND
Description
Ground connection.
RF output from the low noise amplifier. Internally matched to 50 Ω and DC blocked.
Ground connection.
LNA supply voltage
DC power detector. Provides an output voltage proportional to the RF output power level
Input enable bias voltage (Regulated internally)
No electrical connection. It may be left floating or connected to ground.
RF input. Internally matched to 50 Ω and DC Shorted.
No electrical connection. It may be left floating or connected to ground.
1
st
and 2
nd
stage supply voltage
3
rd
stage supply voltage
Ground connection.
RF bi-directional antenna port. Internally matched to 50 Ω and DC blocked.
Ground connection.
Transmit-receive control voltage.
LNA enable bias voltage
RF/DC ground. Use recommended via pattern to minimize inductance and thermal resistance. See
PCB Mounting Pattern for suggested footprint.
QPF4538 DS 20161212 | Subject to change without notice
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