Rev. 1.5
512K X 8 BIT HIGH SPEED CMOS SRAM
LY61L5128A
REVISION HISTORY
Revision
Rev. 1.0
Rev. 1.1
Description
Initial Issue
Revised
TEST CONDITION
of Average Operating Power Supply
Current(Icc
1
) on page 3,
“CE#
≧
V
CC
- 0.2V” revised as ”CE#
≦
0.2V”
Add “Green
package available”
on page 1
1. Revised
TEST CONDITION
of V
OH
, V
OL
on page 4
I
OH
= -8mA revised as -4mA
I
OL
=4mA revised as 8mA
2. Revised V
IH(max)
& V
IL(min)
Notes on page 4
V
IH(max)
= V
CC
+ 2.0V for pulse width less than 6ns.
V
IL(min)
= V
SS
- 2.0V for pulse width less than 6ns.
Revised the address pin sequence of TSOP-II pin configuration on page 2
to be compatible with industrial convention. (No function specifications and
applications changed and all characteristics kept same as Rev 1.3 )
Deleted Commercial Grade
Added PKG type : 36-ball 6mm x 8mm TFBGA
Deleted
WRITE CYCLE
Notes :
1.WE#,CE# must be high during all address transitions.
In page 6.
Issue Date
Jul.12.2012
Jul.19.2012
Rev. 1.2
Rev. 1.3
Nov.02.2012
Jun.04.2013
Rev. 1.4
Rev. 1.5
Oct.30.2013
Jun.22.2016
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
2F, No. 17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
0
Rev. 1.5
512K X 8 BIT HIGH SPEED CMOS SRAM
GENERAL DESCRIPTION
The LY61L5128A is a 4,194,304-bit high speed CMOS
static random access memory organized as 524,288
words by 8 bits. It is fabricated using very high
performance, high reliability CMOS technology. Its
standby current is stable within the range of operating
temperature.
The LY61L5128A operates from a single power
supply of 3.3V and all inputs and outputs are fully TTL
compatible
LY61L5128A
FEATURES
Fast access time : 8/10/12ns
Low power consumption:
Operating current:
50/40/35mA(TYP.)
Standby current:
2mA(TYP.)
Single 3.3V power supply
All inputs and outputs TTL compatible
Fully static operation
Tri-state output
Green package available
Data retention voltage : 1.5V (MIN.)
Package : 44-pin 400 mil TSOP-II
36-ball 6mm x 8mm TFBGA
PRODUCT FAMILY
Product
Family
LY61L5128A(I)
Operating
Temperature
-40 ~ 85℃
V
CC
Range
2.7 ~ 3.6V
3.0 ~ 3.6V
Speed
10/12ns
8ns
Power Dissipation
Standby(I
SB1
,
TYP.) Operating(I
CC1
,TYP.)
2mA
40/35mA
2mA
50mA
FUNCTIONAL BLOCK DIAGRAM
PIN DESCRIPTION
SYMBOL
A0 - A18
DQ0 – D7
CE#
WE#
OE#
V
CC
V
SS
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Inputs
Write Enable Input
Output Enable Input
Power Supply
Ground
No Connection
Vcc
Vss
A0-A18
DECODER
512Kx8
MEMORY ARRAY
DQ0-DQ7
I/O DATA
CIRCUIT
COLUMN I/O
CE#
WE#
OE#
CONTROL
CIRCUIT
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
2F, No. 17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
1
Rev. 1.5
512K X 8 BIT HIGH SPEED CMOS SRAM
LY61L5128A
PIN CONFIGURATION
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
2F, No. 17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
2
Rev. 1.5
512K X 8 BIT HIGH SPEED CMOS SRAM
LY61L5128A
ABSOLUTE MAXIMUN RATINGS*
PARAMETER
Voltage on V
CC
relative to V
SS
Voltage on any other pin relative to V
SS
Operating Temperature
Storage Temperature
Power Dissipation
DC Output Current
SYMBOL
V
T1
V
T2
T
A
T
STG
P
D
I
OUT
RATING
-0.5 to 4.6
-0.5 to V
CC
+0.5
-40 to 85(I grade)
-65 to 150
1
50
UNIT
V
V
℃
℃
W
mA
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is
not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
TRUTH TABLE
MODE
Standby
Output Disable
Read
Write
Note:
CE#
H
L
L
L
OE#
X
H
L
X
WE#
X
H
H
L
I/O OPERATION
High-Z
High-Z
D
OUT
D
IN
SUPPLY CURRENT
I
SB
,I
SB1
I
CC
,I
CC1
I
CC
,I
CC1
I
CC
,I
CC1
H = V
IH
, L = V
IL
, X = Don't care.
DC ELECTRICAL CHARACTERISTICS
PARAMETER
Supply Voltage
Input High Voltage
Input Low Voltage
Input Leakage Current
Output Leakage
Current
Output High Voltage
Output Low Voltage
SYMBOL
V
CC
V
IH*1
V
IL*2
I
LI
I
LO
V
OH
V
OL
I
CC
Average Operating
Power Supply Current
I
CC1
Standby Power
Supply Current
I
SB
I
SB1
TEST CONDITION
-8
-10/-12
MIN.
3.0
2.7
2.2
- 0.3
-1
-1
2.4
-
-
-
-
-
-
-
-
-
MAX.
TYP.
*4
3.3
3.6
3.3
3.6
-
V
CC
+0.3
-
0.8
-
1
-
-
-
65
50
45
50
40
35
-
2
1
-
0.4
80
70
60
60
55
50
30
10
UNIT
V
V
V
V
µA
µA
V
V
mA
mA
mA
mA
mA
mA
mA
mA
V
CC
≧
V
IN
≧
V
SS
V
CC
≧
V
OUT
≧
V
SS
,
Output Disabled
I
OH
= -4mA
I
OL
= 8mA
-8
Cycle time = Min.
CE# = V
IL
, I
I/O
= 0mA,
-10
Others at V
IL
or V
IH
-12
-8
CE#
≦
0.2,
Others at 0.2V or Vcc-0.2V -10
I
I/O
= 0mA;f=max
-12
CE# =V
IH
, Others at V
IL
or V
IH
CE#
≧
V
CC
- 0.2V,
Others at 0.2V or V
CC
- 0.2V
Notes:
1. V
IH(max)
= V
CC
+ 2.0V for pulse width less than 6ns.
2. V
IL(min)
= V
SS
- 2.0V for pulse width less than 6ns.
3. Over/Undershoot specifications are characterized on engineering evaluation stage, not for mass production test.
4. Typical values are included for reference only and are not guaranteed or tested.
Typical valued are measured at V
CC
= V
CC
(TYP.) and T
A
= 25℃
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
2F, No. 17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
3
Rev. 1.5
512K X 8 BIT HIGH SPEED CMOS SRAM
LY61L5128A
CAPACITANCE
(T
A
= 25℃, f = 1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
C
IN
C
I/O
MIN.
-
-
MAX
8
10
UNIT
pF
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Speed
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
8/10/12ns
0.2V to V
CC
- 0.2V
3ns
1.5V
C
L
= 30pF + 1TTL, I
OH
/I
OL
= -4mA/8mA
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
(2) WRITE CYCLE
PARAMETER
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High-Z
SYM.
t
WC
t
AW
t
CW
t
AS
t
WP
t
WR
t
DW
t
DH
t
OW
*
t
WHZ
*
LY61L5128A-8
MIN.
MAX.
8
-
6.5
-
6.5
-
0
-
6.5
-
0
-
5
-
0
-
2
-
-
3
LY61L5128A-10 LY61L5128A-12
MIN.
MAX.
MIN.
MAX.
10
-
12
-
8
-
10
-
8
-
10
-
0
-
0
-
8
-
10
-
0
-
0
-
6
-
7
-
0
-
0
-
2
-
2
-
-
4
-
5
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SYM.
t
RC
t
AA
t
ACE
t
OE
t
CLZ
*
t
OLZ
*
t
CHZ
*
t
OHZ
*
t
OH
LY61L5128A-8
MIN.
MAX.
8
-
-
8
-
8
-
4.5
2
-
0
-
-
3
-
3
2
-
LY61L5128A-10 LY61L5128A-12
MIN.
MAX.
MIN.
MAX.
10
-
12
-
-
10
-
12
-
10
-
12
-
4.5
-
5
2
-
3
-
0
-
0
-
-
4
-
5
-
4
-
5
2
-
2
-
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
*These parameters are guaranteed by device characterization, but not production tested.
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
2F, No. 17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
4
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