Space Applications Only
PRA HR (CNW HR)
Vishay Sfernice
ESA (
) Qualified High Precision Chip Resistor Arrays
FEATURES
•
High stability passivated nichrome resistive
layer 0.02 % on ratio, 1000 h at Pn at + 70 °C
•
Tight TCR (10 ppm/°C) and TCR tracking (3 ppm/°C)
•
Very low noise < 35 dB and voltage coefficient
< 0.01 ppm/V
•
Ratio tolerance to 0.01 % (R
≥
200R)
•
Pre-tinned terminations over nickel barrier
•
ESCC qualified
•
ESCC 4001 (generic specification)
•
ESCC 4001/025 (detailed specification)
•
SMD wraparound chip resistor array
•
Up to eight different ohmic values (CNW HR)
•
Halogen-free according to IEC 61249-2-21
Vishay Sfernice Thin Film division holds ESCC QML
qualification (ESCC technology flow qualification). PRA
Hi-Rel arrays can be used in most applications requiring a
matched pair (or set) of resistor elements. The networks
provide 3 ppm/°C TCR tracking, a ratio tolerance as tight as
0.05 % and outstanding stability. They are available in 1 mm,
1.35 mm and 1.82 mm pitch.
TYPICAL PERFORMANCE
ABS
TRACKING
3 ppm/°C
RATIO
0.05 %
TCR
10 ppm/°C
ABS
TOL
0.1 %
DIMENSIONS
Land Pattern
R
S
R
P
Q
F
TC tracking: 3 ppm/°C if all resistors of the array are:
Rn > 250
Ω
TC tracking: 5 ppm/°C if one or more resistors of the array is
in the range: 100
Ω
to 250
Ω
included
PRA HR 182
mm
3.0
0.4
1.3
+ 0.2
- 0.1
+ 0.2
- 0.2
+ 0.35
- 0.15
DIM.
A
B
C
D
E
(1)
F
G
P
Q
R
S
PRA HR 100
mm
1.6
0.4
0.65
+ 0.2
- 0.1
+ 0.2
- 0.2
+ 0.15
- 0.15
PRA HR 135
mm
1.85
0.4
1.05
+ 0.2
- 0.1
+ 0.2
- 0.2
+ 0.15
- 0.15
I: Independent resistors
E
Termination
Electrical diagram
R1
R2
R7
R8
mil
63
16
25.5
10
mil
72
16
41
10
mil
118
16
51
10
B
C
D
A
0.25
0.25
0.25
E = (N x F) ± 0.2 mm
1
0.38
+ 0.2
-0
E = (N x F) ± 8 mil
53.1
15
41.3
12
40
31.5
1.82
0.38
+ 0.2
-0
F
G
Number
of resistors:
2 to
8
R1 = R2 = ... R8
40
15
27.5
12
40
23.5
1.35
0.38
+ 0.2
-0
72
15
59.8
12
40
70.8
A
E
0.7
0.3
1
0.6
1.05
0.3
1
0.8
1.52
0.3
1
1.8
C: One common point
N
resistors
R1
R2
R7
R8
Note
(1)
E depends on number of resistors
B
C
D
F
G
Number
of resistors:
2 to
8
R1 = R2 = ... R8
Document Number: 53043
Revision: 29-Jul-09
For technical questions, contact:
sfer@vishay.com
www.vishay.com
77
Space Applications Only
PRA HR (CNW HR)
Vishay Sfernice
ESA (
) Qualified High Precision Chip
Resistor Arrays
GLOBAL PART NUMBER INFORMATION
New Global Part Numbering: PRAHR100I4-10K2BWBT
P
R
A
H
R
1
0
0
I
4
-
1
0
K
2
B
W
B
T
GLOBAL
MODEL
PRA HR 100
PRA HR 135
PRA HR 182
CONFIGURATION
I: Independent
NUMBERS OF
RESISTORS
2 to 8
OHMIC VALUE
IN CLEAR
Decimal
R, K or M
ABS. TOL.
B = 0.1 %
D = 0.5 %
F=1%
RATIO TOL.
W = 0.05 %
B = 0.1 %
TERMINATION
SnPb over
nickel barrier
PACKAGING
(1)
Blank =
Waffle Pack
T=
Tape and Reel
For different ohmic values on a given network a specific number is used
CNW HR
GLOBAL MODEL
1368
CUSTOM NETWORK
REFERENCE
T
PACKAGING
(1)
Blank = Waffle Pack
T = Tape and Reel
Note
(1)
Tape and reel not available for all sizes. See Packaging table. MOQ for taping: 50 pieces.
ESCC CODE
4
0
0
1
0
2
5
0
1
1
0
0
1
B
W
1
DETAILED SPEC.
NUMBER
VARIANT
NUMBER
01 to 21
RESISTANCE
VALUE
The first three digits are
significant figures and
the last digit specifies
the number of zeros to
follow.
Example:
3901 = 3900
Ω
1004 = 1 MΩ
ABSOLUTE
TOLERANCE
B = 0.1 %
D = 0.5 %
F=1%
RATIO
TOLERANCE
W = 0.05 %
B = 0.1 %
ABSOLUTE
TCR
1 = 10 ppm/°C
4
0
0
1
0
2
5
2
2
1
2
2
9
B
W
1
DETAILED SPEC.
NUMBER
VARIANT
NUMBER
22 to 42
CUSTOM NETWORK
REFERENCE
Four digits number
defined per
Vishay Sfernice
ABSOLUTE
TOLERANCE
B = 0.1 %
D = 0.5 %
F=1%
RATIO
TOLERANCE
W = 0.05 %
B = 0.1 %
ABSOLUTE
TCR
1 = 10 ppm/°C
NOTION OF SINGLE LOT
The homogeneity of lots is given by the front end lot numbers (primary process lot) and not by the date code.
The date code is applied after completion of end of production testing. Parts coming from different lots might have same date
code.
A customer who needs lot homogeneity should mention on his order: SINGLE PRODUCTION LOT
www.vishay.com
78
For technical questions, contact:
sfer@vishay.com
Document Number: 53043
Revision: 29-Jul-09
Space Applications Only
PRA HR (CNW HR)
ESA (
OPTIONS
LOT VALIDATION TESTING
For procurement of qualified components, lot validation testing is not required and shall only be performed if specifically stipulated
in the purchase order.
For procurement of unqualified components, lot validation testing shall be performed as stipulated in the purchase order. The
need for lot validation testing shall be determined by the orderer.
When lot validation testing is required, it shall consist of the performance of one or more of the tests or subgroup test sequences
of chart F4 indicated in the ESA Generic Specification ESCC 4001. The testing to be performed and the sample size shall be as
stipulated in the purchase order. When procurement of more than one component type is involved from a family, range or series,
the selection of representative samples shall also be stipulated in the purchase order.
Lot validation testing will be composed of one LVT charges and LVT samples:
Lot validation test charges has to be ordered separately on purchase order.
Lot validation samples have to be ordered separately on purchase order
FINAL INSPECTION
If requested by the orderer a final inspection can be performed on site.
Final inspection has to be stipulated separately on purchase order.
) Qualified High Precision Chip
Resistor Arrays
Vishay Sfernice
STANDARD ELECTRICAL SPECIFICATIONS
TEST
PRA HR 100
Resistance range
PRA HR 135
PRA HR 182
Absolute
Tolerance
Ratio
Absolute
TCR
Ratio
PRA HR 100
Power rating
PRA HR 135
PRA HR 182
Operating temperature range
Stonage temperature range
Soldering temperature
PRA HR 100
Limiting voltage
PRA HR 135
PRA HR 182
PRA HR 100
Insulation voltage
PRA HR 135
PRA HR 182
SPECIFICATIONS
100
Ω
to 200 kΩ
100
Ω
to 250 kΩ
100
Ω
to 1 MΩ
0.1 % to 1 %
0.05 % to 0.1 %
± 10 ppm/°C
3 ppm/°C if all resistors of the array are: Rn > 250
Ω
100 mW per resistor
100 mW per resistor
100 mW per resistor
- 55 °C to + 155 °C
- 55 °C to + 155 °C
260 °C
35 V
75 V
100 V
70 V
RMS
150 V
RMS
200 V
RMS
Max.
- 40 °C + 155 °C
- 40 °C + 155 °C
At + 70 °C
At + 70 °C
At + 70 °C
CONDITION
MECHANICAL SPECIFICATIONS
Substrate
Technology
Film
Terminations
Alumina
Thin Film
Nickel chromium with mineral passivation
B type:
SnPb over nickel barrier
SPECIAL FEATURES
Resistance values can be different on a given network
(R max./R min. as high as 300). Tooling charges might
be required depending on the ohmic values in the
same network. Please, consult Vishay Sfernice for ohmic
values, tolerances and also temperature coefficient outside
the standard range.
Document Number: 53043
Revision: 29-Jul-09
For technical questions, contact:
sfer@vishay.com
www.vishay.com
79
Space Applications Only
PRA HR (CNW HR)
Vishay Sfernice
POWER RATING
Rated Power (%)
ESA (
) Qualified High Precision Chip
Resistor Arrays
100
80
60
40
20
0
0
20
40
60 70
80
100
120
140 155
Ambient Temperature in °C
PACKAGING
Several types of packaging are available: Waffle-pack and tape and reel.
NUMBER OF PIECES PER PACKAGE
TAPE AND REEL
(1)
SIZE
PRA100 x 2
PRA100 x 3
PRA100 x 4
PRA100 x 5
PRA100 x 6
PRA100 x 7
PRA100 x 8
PRA135 x 2
PRA135 x 3
PRA135 x 4
PRA135 x 5
PRA135 x 6
PRA135 x 7
PRA135 x 8
PRA182 x 2
PRA182 x 3
PRA182 x 4
PRA182 x 5
PRA182 x 6
PRA182 x 7
PRA182 x 8
Note
(1)
Other sizes upon request
100
100
100
MOQ
WAFFLE PACK MAX. QUANTITY PER BOX
MIN.
100
140
60
50
50
50
28
140
60
60
50
28
24
24
60
60
50
21
24
24
20
100
100
100
100
4000
4000
4000
4000
100
4000
100
4000
100
100
4000
4000
100
4000
100
100
100
MAX.
4000
4000
4000
www.vishay.com
80
For technical questions, contact:
sfer@vishay.com
Document Number: 53043
Revision: 29-Jul-09
Space Applications Only
PRA HR (CNW HR)
ESA (
MARKING
The marking of all components delivered to this specification shall be in accordance with the requirements of ESCC Basic
Specifications No. 21700. When the component is too small to accomodate all of the marking specified, as much as space permits
shall be marked and the marking information, in full, shall accompany each component in its primary package.
The information to be marked and the order of precedence, shall be as follows:
(a) Rated Resistance (for variants 01 to 21); Terminal identification and array reference code (for variants 22 to 42) (see Physical
Dimensions and Terminal Identification)
(b) The ESCC qualified components symbol (for ESCC qualified components only)
(c) The ESCC component number
(d) Traceability information
Terminal identification shall be by means of the location of the marking. Due to the size of the component only the 4 digit
resistance value code or array reference code, as applicable (see the ESCC component number), shall be marked on the
component.
For symmetrical marking using reversible figures such as 0, 6 or 9, the first resistor of the array, R1, shall be identified by a dot.
For arrays with 2 or 3 resistors, the marking shall be located adjacent to the first 2 resistors of the array. The first resistor, R1, of
the array is the upper resistor whilst reading the marking, as follows:
6
5
4
Resistor 1
13
67
1
13
4
) Qualified High Precision Chip
Resistor Arrays
Vishay Sfernice
1
Resistor 1
2
Resistor 2
3
Resistor 3
Resistor 2
2
67
5
Resistor 3
3
6
For arrays with 4 to 8 resistors, the marking shall be located adjacent to the first 4 resistors of the array. The first resistor, R1, of
the array is on the left hand end of the array whilst reading the marking, as follows:
12
11
10
9
8
7
5
0
0
2
1
Resistor 1
2
Resistor 2
3
Resistor 3
4
Resistor 4
5
Resistor 5
6
Resistor 6
PERFORMANCE
TESTS
Overload
Climatic sequences
Thermal shock
Load life
Resistance to solder heat
Moisture resistance
High temperature storage
Note
• Rn: Nominal resistance
Document Number: 53043
Revision: 29-Jul-09
For technical questions, contact:
sfer@vishay.com
www.vishay.com
81
CONDITIONS
CECC REQUIREMENTS
2.5 Un/2 s
- 55 °C to + 155 °C/5 moisture cycles
- 55 °C to + 155 °C/5 cycles 30'
1000 h/Pn at + 70 °C
2000 h
260 °C/10 s
0.01 Pn at + 40 °C 93 % RH
1000 h/no load at + 155 °C
DRIFTS
ABSOLUTE PER
(Typical Values)
0.05 % Rn + 0.05
Ω
0.1 % Rn + 0.05
Ω
0.05 % Rn + 0.05
Ω
0.1 % Rn + 0.05
Ω
0.15 % Rn + 0.05
Ω
0.05 % Rn + 0.05
Ω
0.1 % Rn + 0.05
Ω
0.1 % Rn + 0.05
Ω
0.01 % Rn
0.01 % Rn
0.02 % Rn
RATIO
0.01 % Rn
0.01 % Rn
0.01 % Rn
0.02 % Rn
Microcontroller MCU
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