SN74HCT373N datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > logic> logic> SN74HCT373N

SN74HCT373N: DescriptionVoltage-Power: 4.5V ~ 5.5V Logic type: D-type transparent latch Output type: Tri-state Series: 74HCT Octal transparent class-D latch with tri-state output; Categorylogic logic; File Size1MB，21 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/; Environmental Compliance

Stay tuned Parametric Compare

SN74HCT373N Online Shopping

Suppliers	Part Number	Price	MOQ	In stock
	SN74HCT373N	-	-	View	Buy Now

SN74HCT373N Overview

Voltage-Power: 4.5V ~ 5.5V Logic type: D-type transparent latch Output type: Tri-state Series: 74HCT Octal transparent class-D latch with tri-state output

SN74HCT373N Parametric

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Texas Instruments
Parts packaging code	DIP
package instruction	DIP-20
Contacts	20
Reach Compliance Code	compliant
ECCN code	EAR99
Factory Lead Time	1 week
Samacsys Description	OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
Control type	ENABLE LOW
Counting direction	UNIDIRECTIONAL
series	HCT
JESD-30 code	R-PDIP-T20
JESD-609 code	e4
length	25.4 mm
Load capacitance (CL)	150 pF
Logic integrated circuit type	BUS DRIVER
MaximumI(ol)	0.006 A
Number of digits	8
Number of functions	1
Number of ports	2
Number of terminals	20
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP20,.3
Package shape	RECTANGULAR
Package form	IN-LINE
method of packing	TUBE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Maximum supply current (ICC)	0.08 mA
Prop。Delay @ Nom-Sup	44 ns
propagation delay (tpd)	65 ns
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm
Base Number Matches	1

SN74HCT373N Related Products

	SN74HCT373N	SN74HCT373PWR	SN74HCT373DWR
Description	Voltage-Power: 4.5V ~ 5.5V Logic type: D-type transparent latch Output type: Tri-state Series: 74HCT Octal transparent class-D latch with tri-state output	Voltage-Power: 4.5V ~ 5.5V Logic type: D-type transparent latch Output type: Three-state Series: 74HC	Voltage-Power: 4.5V ~ 5.5V Logic type: D-type transparent latch Output type: Three-state Series: 74HCT
Brand Name	Texas Instruments	Texas Instruments	Texas Instruments
Is it lead-free?	Lead free	Lead free	Lead free
Is it Rohs certified?	conform to	conform to	conform to
Maker	Texas Instruments	Texas Instruments	Texas Instruments
Parts packaging code	DIP	TSSOP	SOIC
package instruction	DIP-20	TSSOP, TSSOP20,.25	SOP, SOP20,.4
Contacts	20	20	20
Reach Compliance Code	compliant	compliant	compliant
ECCN code	EAR99	EAR99	EAR99
Factory Lead Time	1 week	1 week	1 week
Control type	ENABLE LOW	ENABLE LOW	ENABLE LOW
Counting direction	UNIDIRECTIONAL	UNIDIRECTIONAL	UNIDIRECTIONAL
series	HCT	HCT	HCT
JESD-30 code	R-PDIP-T20	R-PDSO-G20	R-PDSO-G20
JESD-609 code	e4	e4	e4
length	25.4 mm	6.5 mm	12.8 mm
Load capacitance (CL)	150 pF	50 pF	150 pF
Logic integrated circuit type	BUS DRIVER	BUS DRIVER	BUS DRIVER
MaximumI(ol)	0.006 A	0.006 A	0.006 A
Number of digits	8	8	8
Number of functions	1	1	1
Number of ports	2	2	2
Number of terminals	20	20	20
Maximum operating temperature	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C
Output characteristics	3-STATE	3-STATE	3-STATE
Output polarity	TRUE	TRUE	TRUE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	DIP	TSSOP	SOP
Encapsulate equivalent code	DIP20,.3	TSSOP20,.25	SOP20,.4
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE
method of packing	TUBE	TR	TR
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	260	260
power supply	5 V	5 V	5 V
Maximum supply current (ICC)	0.08 mA	0.08 mA	0.08 mA
Prop。Delay @ Nom-Sup	44 ns	44 ns	44 ns
propagation delay (tpd)	65 ns	65 ns	65 ns
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	5.08 mm	1.2 mm	2.65 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V
surface mount	NO	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	THROUGH-HOLE	GULL WING	GULL WING
Terminal pitch	2.54 mm	0.65 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	7.62 mm	4.4 mm	7.5 mm
Base Number Matches	1	1	1
Humidity sensitivity level	-	1	1

Recommended Resources

Infrared remote control dimming circuit a

Electronic birthday candle circuit (1)

Active high power factor correction pre-regulator circuit diagram using UC3852

Video signal switching circuit

Binary voltage generator circuit

Broadband amplifier

HCS08 Clock Module Example: This is a description and sample code of the HCS08 microcontroller clock module found on the Internet. It is worth referring to....; bluehacker NXP MCU

Please recommend some good books on data structure and compiler theory: Don't be fooled by others. I have never studied data structure in my major. I have only read a little bit. I have just heard about compiler theory. Please recommend some good books. I will order them ...; corsair0101 Embedded System

At what frequency multiple does the signal become so weak that it can be ignored?: I have seen someone say before that "the frequency of the carrier signal is generally more than ten times that of the modulating signal". Is it because if the frequency difference is smaller, the freq...; 拜月潇湘 Analog electronics

Can anyone please explain this circuit to me?: Can these two circuits be self-locking? Seniors, is there anyone who has time to help? Thank you in advance....; wanghlady Integrated technical exchanges

C language traps and flaws.chm: For those of you who think you have "learned" C, please read this article carefully. There is still a long way to go and a lot to learn. I am also... This article describes the ways in which C can hur...; a375284206 Programming Basics

USB JOYSTICK, if you have tried it, please add me. I have questions to ask.: If you have made JOYSTICK USB, please add my QQ 570374883...; 课程设计 Embedded System

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components