TLP2309
Photocouplers
GaAℓAs Infrared LED & Photo IC
TLP2309
1. Applications
•
•
•
Transistor Inverters
Switching Power Supplies
High-Speed Digital Interfacing
2. General
The Toshiba TLP2309 consists of a high-output GaAℓAs light-emitting diode coupled with a high-speed photo-
diode-transistor chip. It is housed in the SO6 package.The TLP2309 guarantees operation at up to 110
and on
supplies both 3.3 V and 5 V. Also, since the TLP2309 guarantees a creepage / clearance distance
≥
5.0 mm and
internal isolation thickness
≥
0.4 mm, this product is in the reinforced insulation class according to international
safety standards.
3. Features
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
Inverter logic type (open collector output)
Package: SO6
Operating temperature: -40 to 110
Supply voltage: 3.3 V / 5 V
Data transfer rate: 1 Mbit/s (typ.) (NRZ)
Common-mode transient immunity: 15 kV/µs (min)
Isolation voltage: 3750 Vrms (min)
Safety standards
UL-approved: UL1577, File No.E67349
cUL-approved: CSA Component Acceptance Service No.5A File No.E67349
VDE-approved: EN60747-5-5 (Note 1)
CQC-approved: GB4943.1, GB8898 Thailand Factory
Note 1: When an EN60747-5-5 approved type is needed, please designate the Option (V4)
(V4).
Start of commercial production
©2015 Toshiba Corporation
1
2011-04
2015-11-27
Rev.7.0
TLP2309
4. Packaging and Pin Configuration
1: Anode
3: Cathode
4: GND
5: V
O
(Output)
6: V
CC
11-4L1S
5. Internal Circuit
6. Principle of Operation
6.1. Truth Table
Input
H
L
LED
ON
OFF
Output
L
H
6.2. Mechanical Parameters
Characteristics
Creepage distances
Clearance distances
Internal isolation thickness
Min
5.0
5.0
0.4
Unit
mm
©2015 Toshiba Corporation
2
2015-11-27
Rev.7.0
TLP2309
7. Absolute Maximum Ratings (Note) (Unless otherwise specified, T
a
= 25
)
Characteristics
LED
Input forward current
Input forward current derating
Input forward current (pulsed)
Input forward current derating
(pulsed)
Peak transient input forward
current
Peak transient input forward
current derating
Input power dissipation
Input power dissipation
derating
Input reverse voltage
Detector Output current
Peak output current
Supply voltage
Output voltage
Output power dissipation
Output power dissipation
derating
Common Operating temperature
Storage temperature
Lead soldering temperature
Isolation voltage
(10 s)
AC, 60 s, R.H.
≤
60 %
(T
a
≥
100
)
(T
a
≥
100
)
(T
a
≥
85
)
(T
a
≥
100
)
(T
a
≥
100
)
Symbol
I
F
∆I
F
/∆T
a
I
FP
∆I
FP
/∆T
a
I
FPT
∆I
FPT
/∆T
a
P
D
∆P
D
/∆T
a
V
R
I
O
I
OP
V
CC
V
O
P
O
∆P
O
/∆T
a
T
opr
T
stg
T
sol
BV
S
(Note 3)
(Note 2)
(Note 1)
Note
Rating
25
-1.0
50
-2.0
1
-25
40
-1.6
5
8
16
-0.5 to 30
-0.5 to 20
100
-4.0
-40 to 110
-55 to 125
260
3750
Vrms
mW
mW/
V
Unit
mA
mA/
mA
mA/
A
mA/
mW
mW/
V
mA
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: Pulse width (PW)
≤
1 ms, duty = 50 %
Note 2: Pulse width (PW)
≤
1
µs,
300 pps
Note 3: This device is considered as a two-terminal device: Pins 1 and 3 are shorted together, and pins 4, 5 and 6 are
shorted together.
Note:
8. Recommended Operating Conditions (Note)
Characteristics
Input on-state current
Input off-state voltage
Supply voltage
Operating temperature
Symbol
I
F(ON)
V
F(OFF)
V
CC
T
opr
(Note 1)
Note
Min
10
0
2.7
-40
Typ.
3.3 / 5
Max
20
0.8
20
110
Unit
mA
V
The recommended operating conditions are given as a design guide necessary to obtain the intended
performance of the device. Each parameter is an independent value. When creating a system design using
this device, the electrical characteristics specified in this datasheet should also be considered.
Note: A ceramic capacitor (0.1
µF)
should be connected between pin 6 and pin 4 to stabilize the operation. Otherwise,
this photocoupler may not switch properly. The bypass capacitor should be placed within 1 cm of each pin.
Note 1: Denotes the operating range, not the recommended operating condition.
Note:
©2015 Toshiba Corporation
3
2015-11-27
Rev.7.0
TLP2309
9. Electrical Characteristics (Note)
(Unless otherwise specified, T
a
= 25
)
Characteristics
Input forward voltage
Input forward voltage
temperature coefficient
Input reverse current
Input capacitance
High-level output current
Symbol
V
F
I
F
= 10 mA
Test Condition
Min
1.45
15
15
Typ.
1.55
-2.0
60
3
0.01
Max
1.7
10
500
5
50
1
0.4
V
%
Unit
V
mV/
µA
pF
nA
µA
∆V
F
/∆T
a
I
F
= 10 mA, T
a
= -40
to 110
I
R
C
t
I
OH
V
R
= 5 V
V = 0 V, f = 1 MHz
I
F
= 0 mA, V
O
= 5.5 V, V
CC
= 5.5 V
I
F
= 0 mA, V
O
= 20 V, V
CC
= 30 V
I
F
= 0 mA, V
O
= 20 V, V
CC
= 30 V,
T
a
= 110
High-level supply current
Current transfer ratio
Low-level output voltage
I
CCH
I
O
/I
F
V
OL
I
F
= 0 mA, V
CC
= 30 V
I
F
= 10 mA, V
O
= 0.4 V, V
CC
= 3.3 V
I
F
= 16 mA, V
O
= 0.4 V, V
CC
= 4.5 V
I
F
= 16 mA, V
CC
= 4.5 V, I
O
= 2.4 mA
Note:
All typical values are at T
a
= 25
.
10. Isolation Characteristics (Unless otherwise specified, T
a
= 25
)
Characteristics
Total capacitance (input to output)
Isolation resistance
Isolation voltage
Symbol
C
S
R
S
BV
S
Note
Test Conditions
Min
1
×
10
12
3750
Typ.
0.8
10
14
10000
10000
Max
Vdc
Unit
pF
Ω
Vrms
(Note 1) V
S
= 0 V, f = 1 MHz
(Note 1) V
S
= 500 V, R.H.
≤
60 %
AC, 60 s
AC, 1 s in oil
DC, 60 s in oil
Note 1: This device is considered as a two-terminal device: Pins 1 and 3 are shorted together, and pins 4, 5 and 6 are
shorted together.
11. Switching Characteristics (Note)
(Unless otherwise specified, T
a
= -40 to 110
)
Characteristics
Propagation delay time (H/L)
Propagation delay time (L/H)
Propagation delay time (H/L)
Propagation delay time (L/H)
Common-mode transient
immunity at output high
Common-mode transient
immunity at output low
Symbol
t
pHL
t
pLH
t
pHL
t
pLH
CM
H
(Note 1)
Fig.
12.1.1
Note
Test
Circuit
Test Condition
Min
15
Typ.
20
Max
1
1
0.8
0.8
kV/µs
Unit
µs
Fig. I
F
= 0→10 mA, R
L
= 1.9 kΩ,
12.1.1 V
CC
= 3.3 V, C
L
= 15 pF
I
F
= 10→0 mA, R
L
= 1.9 kΩ,
V
CC
= 3.3 V, C
L
= 15 pF
I
F
= 0→16 mA, R
L
= 1.9 kΩ,
V
CC
= 5 V, C
L
= 15 pF
I
F
= 16→0 mA, R
L
= 1.9 kΩ,
V
CC
= 5 V, C
L
= 15 pF
Fig. I
F
= 0 mA, V
CC
= 3.3 V / 5 V,
12.1.2 V
CM
= 400 V
p-p
, R
L
= 4.1 kΩ,
T
a
= 25
I
F
= 10 mA, V
CC
= 3.3 V / 5 V,
V
CM
= 400 V
p-p
, R
L
= 4.1 kΩ,
T
a
= 25
CM
L
(Note 1)
-15
-20
Note: All typical values are at T
a
= 25
.
Note 1: CM
H
is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage
in the logic high state (V
O
> 2.0 V).
CM
L
is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in
the logic low state (V
O
< 0.8 V).
©2015 Toshiba Corporation
4
2015-11-27
Rev.7.0
TLP2309
12. Test Circuits and Characteristics Curves
12.1. Test Circuits
Fig. 12.1.1 Switching Time Test Circuit
Fig. 12.1.2 Common-Mode Transient Immunity
©2015 Toshiba Corporation
5
2015-11-27
Rev.7.0
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