TLP2468
Photocouplers
GaAℓAs Infrared LED & Photo IC
TLP2468
1. Applications
•
•
•
Plasma Display Panels (PDPs)
Factory Automation (FA)
Measuring Instruments
2. General
The TLP2468 consists of a high-intensity GaAℓAs infrared light-emitting diode (LED) optically coupled to a high-
gain, high-speed photoreceptor chip. The TLP2468 guarantees operation at up to 125
and wide range operation
of power-supply voltage (2.7V to 5.5V). The TLP2468 has an open-collector output and is offered in the SO8
package. An internal noise shield provides superior common-mode rejection of
±15
kV/µs for improved noise
immunity.
3. Features
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
Inverter logic type (open collector output)
Package: SO8
Operating temperature: -40 to 125
Supply voltage: 2.7 to 5.5 V
Data transfer rate: 20 MBd (typ.) (NRZ)
Threshold input current: 5.0 mA (max)
Supply current: 4 mA (max)
Common-mode transient immunity:
±15
kV/µs (min)
Isolation voltage: 3750 Vrms (min)
UL-approved: UL1577, File No.E67349
cUL-approved: CSA Component Acceptance Service No.5A File No.E67349
VDE-approved: EN60747-5-5 (Note 1)
Note 1: When an EN60747-5-5 approved type is needed, please designate the Option (V4)
(V4).
(10) Safety standards
Start of commercial production
©2015 Toshiba Corporation
1
2010-09
2015-10-26
Rev.6.0
TLP2468
4. Packaging and Pin Configuration
1: N.C
2: Anode
3: Cathode
4: N.C
5: GND
6: V
O
(Output)
7: N.C
8: V
CC
11-5K1S
5. Internal Circuit
6. Principle of Operation
6.1. Truth Table
Input
H
L
LED
ON
OFF
Output
L
H
6.2. Mechanical Parameters
Characteristics
Creepage distances
Clearance distances
Internal isolation thickness
Min
4.0
4.0
Unit
mm
©2015 Toshiba Corporation
2
2015-10-26
Rev.6.0
TLP2468
7. Absolute Maximum Ratings (Note) (Unless otherwise specified, T
a
= 25
)
Characteristics
LED
Input forward current
Input forward current derating
Input forward current (pulsed)
Input forward current derating (pulsed)
Input reverse voltage
Input power dissipation
Detector Output current
Output voltage
Supply voltage
Output power dissipation
Output power dissipation derating
Common Operating temperature
Storage temperature
Lead soldering temperature
Isolation voltage
(10 s)
AC, 60 s, R.H.
≤
60 %
(T
a
≥
110
)
(T
a
≥
110
)
(T
a
≥
110
)
Symbol
I
F
∆I
F
/∆T
a
I
FP
∆I
FP
/∆T
a
V
R
P
D
I
O
V
O
V
CC
P
O
∆P
O
/∆T
a
T
opr
T
stg
T
sol
BV
S
(Note 2)
(Note 1)
Note
Rating
25
-0.67
40
-1.0
5
40
25
6
6
80
-0.1
-40 to 125
-55 to 150
260
3750
Unit
mA
mA/
mA
mA/
V
mW
mA
V
V
mW
mW/
Vrms
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: Pulse width (PW)
≤
1 ms, duty = 50 %
Note 2: This device is considered as a two-terminal device: Pins 1, 2, 3 and 4 are shorted together, and pins 5, 6, 7
and 8 are shorted together.
Note:
8. Recommended Operating Conditions (Note)
Characteristics
Input on-state current
Input off-state voltage
Supply voltage
Operating temperature
Symbol
I
F(ON)
V
F(OFF)
V
CC
T
opr
(Note 2)
Note
(Note 1)
Min
7.5
0
2.7
-40
Typ.
3.3/5.0
Max
14
0.8
5.5
125
Unit
mA
V
The recommended operating conditions are given as a design guide necessary to obtain the intended
performance of the device. Each parameter is an independent value. When creating a system design using
this device, the electrical characteristics specified in this datasheet should also be considered.
Note: A ceramic capacitor (0.1
µF)
should be connected between pin 8 and pin 5 to stabilize the operation of a high-
gain linear amplifier. Otherwise, this photocoupler may not switch properly. The bypass capacitor should be
placed within 1 cm of each pin.
Note 1: The rise and fall times of the input on-current should be less than 0.5
µs.
Note 2: Denotes the operating range, not the recommended operating condition.
Note:
©2015 Toshiba Corporation
3
2015-10-26
Rev.6.0
TLP2468
9. Electrical Characteristics (Note)
(Unless otherwise specified, T
a
= -40 to 125
, V
CC
= 2.7 to 5.5 V)
Characteristics
Input forward voltage
Input forward voltage
temperature coefficient
Input reverse current
Input capacitance
High-level output current
Symbol
V
F
∆V
F
/∆T
a
I
R
C
t
I
OH
Note
Test
Circuit
Fig.
12.1.1
Test Condition
I
F
= 10 mA, T
a
= 25
I
F
= 10 mA
V
R
= 5 V, T
a
= 25
V = 0 V, f = 1 MHz, T
a
= 25
V
F
= 0.8 V, V
O
= 5.5 V,
V
CC
= 5.5 V
V
F
= 0.8 V, V
O
= 5.5 V,
V
CC
= 5.5 V, T
a
= 25
Low-level output voltage
Low-level supply current
High-level supply current
Threshold input current (H/L)
V
OL
I
CCL
I
CCH
I
FHL
Fig.
12.1.2
Fig.
12.1.3
Fig.
12.1.4
I
F
= 10 mA,
I
O
= 13 mA (Sinking)
I
F
= 10 mA
I
F
= 0 mA
I
O
= 13 mA (Sinking),
V
O
< 0.6 V
Min
1.4
Typ.
1.57
-2.0
60
0.2
2.0
1.6
1.0
Max
1.8
10
50
10
0.6
4.0
4.0
5.0
V
mA
Unit
V
mV/
µA
pF
µA
Note:
All typical values are at T
a
= 25
.
10. Isolation Characteristics (Unless otherwise specified, T
a
= 25
)
Characteristics
Total capacitance (input to
output)
Isolation resistance
Isolation voltage
Symbol
C
S
R
S
BV
S
Note
Test Conditions
Min
1
×
10
12
3750
Typ.
0.8
10
14
10000
10000
Max
Vdc
Unit
pF
Ω
Vrms
(Note 1) V
S
= 0 V, f = 1 MHz
(Note 1) V
S
= 500 V, R.H.
≤
60 %
(Note 1) AC, 60 s
AC, 1 s in oil
DC, 60 s in oil
Note 1: This device is considered as a two-terminal device: Pins 1, 2, 3 and 4 are shorted together, and pins 5, 6, 7
and 8 are shorted together.
©2015 Toshiba Corporation
4
2015-10-26
Rev.6.0
TLP2468
11. Switching Characteristics (Note)
(Unless otherwise specified, T
a
= -40 to 125
, V
CC
= 2.7 to 5.5 V)
Characteristics
Propagation delay time
(H/L)
Propagation delay time
(L/H)
Pulse width distortion
Propagation delay skew
(device to device)
Fall time
Rise time
Common-mode transient
immunity at output high
Common-mode transient
immunity at output low
Symbol
t
pHL
t
pLH
|t
pHL
-
t
pLH
|
t
psk
t
f
t
r
CM
H
CM
L
Note
(Note 1)
(Note 1)
(Note 1)
(Note 1),
(Note 2)
(Note 1)
(Note 1)
Fig.
12.1.6
Test
Circuit
Fig.
12.1.5
Test Condition
I
F
= 0
→
7.5 mA, R
L
= 350
Ω,
C
L
= 15 pF
I
F
= 7.5
→
0 mA, R
L
= 350
Ω,
C
L
= 15 pF
I
F
= 0
←→
7.5 mA, R
L
= 350
Ω,
C
L
= 15 pF
I
F
= 0
←→
7.5 mA, R
L
= 350
Ω,
C
L
= 15 pF
I
F
= 0
→
7.5 mA, R
L
= 350
Ω,
C
L
= 15 pF
I
F
= 7.5
→
0 mA, R
L
= 350
Ω,
C
L
= 15 pF
V
CM
= 1000 V
p-p
, I
F
= 0 mA,
V
CC
= 5 V, T
a
= 25
V
CM
= 1000 V
p-p
, I
F
= 10 mA,
V
CC
= 5 V, T
a
= 25
Min
-40
±15
±15
Typ.
30
30
Max
60
60
35
40
kV/µs
Unit
ns
Note: All typical values are at T
a
= 25
.
Note 1: f = 5 MHz, duty = 50 %, input current t
r
= t
f
= 5 ns or less, C
L
is approximately 15 pF which includes probe and
stray wiring capacitance.
Note 2: The propagation delay skew, t
psk
, is equal to the magnitude of the worst-case difference in t
pHL
and/or t
pLH
that will be seen between units at the same given conditions (supply voltage, input current, temperature, etc).
©2015 Toshiba Corporation
5
2015-10-26
Rev.6.0
京公网安备 11010802033920号
EEWORLD
