TLP2530,TLP2531
TOSHIBA Photocoupler GaAℓAs Ired & Photo IC
TLP2530, TLP2531
Digital Logic Isolation
Line Receiver
Power Supply Control
Switching Power Supply
Industrial Inverter
The TOSHIBA TLP2530 and TLP2531 dual photocouplers consist of a pair of
GaAℓAs light emitting diode and integrated photodetector. This unit is 8-lead
DIP. Separate connection for the photodiode bias and output transistor
collectors improve the speed up to a hundred times that of a conventional
phototransistor coupler by reducing the base-collector capacitance.
TTL compatible
Switching speed: t
pHL
= 0.2
μs,
t
pLH
= 0.3
μs
(typ.)
(@R
L
= 1.9 kΩ)
Guaranteed performance over temp: 0°C to 70°C
Isolation voltage: 2500 Vrms (min)
UL aprroved: UL1577, file no. E67349
c-UL approved : CSA Component Acceptance Service
No. 5A, File No.E67349
TOSHIBA
11-10C4
Weight: 0.54 g (typ.)
Unit: mm
Pin Configuration
(top view)
1
2
3
4
1. : Anode.1
2. : Cathode.1
3. : Cathode.2
4. : Anode.2
5. : GND
Gnd
6. : V
O2
(output 2)
7. : V
O1
(output 1)
8. : V
CC
8
7
6
5
Schematic
I
F1
V
F1
+
1
2
+
V
F2
I
F2
I
CC
I
O1
8
V
CC
V
7
O1
I
O2
6
5
V
O2
GND
4
3
Start of commercial production
1986-03
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2017-05-24
TLP2530,TLP2531
Absolute Maximum Ratings
(Ta = 25°C)
Characteristic
Forward current (each channel)
Forward current derating (each channel) (Ta> 70 °C)
Pulse forward current (each channel)
LED
Pulse forward current derating (each channel) (Ta> 70 °C)
Total pulse forward current (each channel)
Reverse voltage (each channel)
Diode power dissipation (each channel)
Diode power dissipation derating (each channel) (Ta> 70 °C)
Output current(each channel)
Peak output current (each channel)
Detector
Output voltage(each channel)
Supply voltage
Output power dissipation (each channel)
Output power dissipation derating (each channel) (Ta> 70 °C)
Operating temperature range
Storage temperature range
Lead solder temperature(10 s)
Isolation voltage (AC, 60 s, R.H.
≤
60%)
(Note 3)
(Note 4)
(Note 2)
(Note 1)
Symbol
I
F
ΔIF/Ta
I
FP
ΔIFP/Ta
I
FPT
V
R
P
D
ΔPD/Ta
I
O
I
OP
V
O
V
CC
P
O
ΔPo/Ta
T
opr
T
stg
T
sol
BV
S
Rating
25
-0.8
50
-1.6
1
5
45
-0.8
8
16
-0.5 to 15
-0.5 to 15
35
-0.6
-55 to 100
-55 to 125
260
2500
Unit
mA
mA / °C
mA
mA / °C
A
V
mW
mW / °C
mA
mA
V
V
mW
mW / °C
°C
°C
°C
Vrms
Note: Using continuously under heavy loads (e.g. the application of high
temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if
the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating
Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: 50% duty cycle, 1ms pulse width.
Note 2: Pulse width
≤
1
μs,
300 pps.
Note 3: 2mm below seating plane.
Note 4: Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together and pins 5, 6, 7 and 8 shorted
together.
Recommended Operating Conditions
Characteristic
Supply voltage
Forward current (each channel)
Operating temperature
Symbol
V
CC
I
F
T
opr
Min
0
―
-25
Typ.
―
16
―
Max
12
25
85
Unit
V
mA
°C
Note: Recommended operating conditions are given as a design
guideline to obtain expected performance of the
device. Additionally, each item is an independent guideline respectively. In developing designs using this
product, please confirm specified characteristics shown in this document.
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2017-05-24
TLP2530,TLP2531
Electrical Characteristics
(Ta = 0°C
to
70°C, unless otherwise noted)
Characteristic
Input forward voltage
(each channel)
Temperature coefficent of
forward voltage (each channel)
Input reverse breakdown
voltage (each channel)
Input capacitance
(each channel)
Symbol
V
F
ΔV
F
/ ΔTa
BV
R
C
T
Test Condition
I
F
= 16mA, Ta = 25°C
I
F
= 16mA
I
R
= 10μA, Ta = 25°C
f = 1MHz, V
F
= 0 V
I
F
= 0mA, V
O
= V
CC
= 5.5V
Ta = 25°C
I
F
= 0mA, V
O
= V
CC
= 15V
I
F1
= I
F2
= 16mA
V
O1
= V
O2
= Open
V
CC
= 15V
I
F1
= I
F2
= 0mA
V
O1
= V
O2
= Open
V
CC
= 15V
I
F
= 16mA, V
O
= 0.4V
V
CC
= 4.5V, Ta = 25°C
I
F
= 16mA, V
O
= 0.4V
V
CC
= 4.5V
I
F
= 16mA, I
O
= 1.1mA
V
CC
= 4.5V
I
F
= 16mA, I
O
= 2.4mA
V
CC
= 4.5V
V
S
= 500 V R.H.
≤
60%
f = 1MHz
V
I
-
I
= 500V
f = 1MHz
(Note 1)
(Note 1)
(Note 1)
(Note 1)
Min
―
―
5
―
―
―
Typ.
1.65
-2
―
45
3
―
Max
1.7
―
―
―
500
50
Unit
V
mV/°C
V
pF
nA
μA
Logic high output current
(each channel)
I
OH
Logic low supply current
I
CCL
―
160
―
μA
Logic high supply current
TLP2530
Current transfer
ratio
(each channel)
TLP2531
TLP2530
TLP2531
Logic low output
voltage
(each channel)
Resistance (input-output)
Capacitance (input-output)
Resistance (input-input)
Capacitance (input-iutput)
TLP2530
I
CCH
―
7
19
5
15
―
―
5×10
10
―
―
―
0.05
30
30
―
―
0.1
0.1
10
14
0.6
10
11
0.25
4
―
―
―
―
0.4
0.4
―
―
―
―
μA
I
O
/ I
F
%
I
O
/ I
F
%
V
V
Ω
pF
Ω
pF
V
OL
TLP2531
R
S
C
S
R
I-I
C
I-I
Note: All typicals at Ta = 25°C.
Note 1: Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together and pins 5, 6, 7 and 8
shorted together.
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2017-05-24
TLP2530,TLP2531
Switching Characteristics
(unless otherwise specified, Ta = 25°C, V
CC
= 5V, I
F
= 16mA)
Characteristic
Propagation delay
time to logic low
at output
(each channel)
Propagation delay
time to logic
high at output
(each channel)
Common mode
transient
immunity at logic
high level output
(each channel)
(Note 1)
Common mode
transient
immunity at logic
low level output
(each channel)
TLP2530
t
pHL
TLP2531
TLP2530
TLP2531
TLP2530
CM
H
TLP2531
2
t
pLH
1
1
R
L
= 1.9kΩ
R
L
= 4.1kΩ
R
L
= 1.9kΩ
V
CM
= 400V
p-p
R
L
= 4.1kΩ, I
F
= 0mA
V
CM
= 400V
p-p
R
L
= 1.9kΩ, I
F
= 0mA
V
CM
= 400V
p-p
CM
L
(Note 1)
TLP2531
BW
3
2
R
L
= 4.1kΩ, I
F
= 16mA
V
CM
= 400
p-p
R
L
= 1.9kΩ, I
F
= 16mA
R
L
= 100Ω
―
―
―
―
0.2
0.5
0.3
1500
0.8
1.5
μs
0.8
―
V / μs
―
1500
―
Symbol
Test
Cir-
cuit
Test Condition
Min
―
Typ.
0.3
Max
1.5
μs
Unit
R
L
= 4.1kΩ
TLP2530
―
-1500
―
V / μs
―
―
-1500
2
―
―
MHz
Bandwidth (each channel)
Note 1:
Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm / dt
on the leading egde of the common mode pulse, Vcm, to assure that the output will remain in a
logic high state (i.e., V
O
> 2.0V).
Common mode transient immunity in logic low Level is the maximum tolerable (negative) dVcm / dt
on the trailing edge of the common mode pulse signal, Vcm, to assure that the output will remain in
logic low state (i.e., V
O
< 0.8V).
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2017-05-24
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