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EDI816256LPA20N44I

Description
Standard SRAM, 256KX16, 20ns, CMOS, CDSO44, CERAMIC, SOJ-44
Categorystorage   
File Size118KB,7 Pages
ManufacturerWhite Microelectronics
Download Datasheet Parametric View All

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EDI816256LPA20N44I Overview

Standard SRAM, 256KX16, 20ns, CMOS, CDSO44, CERAMIC, SOJ-44

EDI816256LPA20N44I Parametric

Parameter NameAttribute value
MakerWhite Microelectronics
package instructionCERAMIC, SOJ-44
Reach Compliance Codeunknown
Is SamacsysN
Maximum access time20 ns
JESD-30 codeR-CDSO-J44
memory density4194304 bit
Memory IC TypeSTANDARD SRAM
memory width16
Number of functions1
Number of terminals44
word count262144 words
character code256000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize256KX16
Package body materialCERAMIC, METAL-SEALED COFIRED
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formJ BEND
Terminal locationDUAL
Base Number Matches1
EDI816256CA
HI-RELIABILITY PRODUCT
256Kx16 MONOLITHIC SRAM
FEATURES
s
256Kx16 bit CMOS Static
s
Random Access Memory
• Access Times of 17, 20, 25, 35ns
• Data Retention Function (LPA version)
• TTL Compatible Inputs and Outputs
• Fully Static, No Clocks
s
44 lead JEDEC Approved Revolutionary Pinout
• Ceramic SOJ (Package 322)
• Ceramic Flatpack (Package 323)
s
Single +5V (±10%) Supply Operation
The EDI816256CA is a 4 megabit Monolithic CMOS Static RAM.
The EDI816256CA uses 16 common input and output lines and has
an output enable pin which operates faster than address access
time at read cycle. The device allows upper and lower byte access
by use of the data byte control pins (LB, UB).
The devices are available in a fully hermetic 44 lead ceramic SOJ
and a 44 lead Ceramic Flatpack. The Ceramic SOJ is pin for pin
compatible with the commercially available plastic SOJ. This
allows the user the luxury of designing a board that can be used
for both the commercial and military market.
A Low Power version with Data Retention (EDI816256LPA) is also
available for battery backed applications. Military product is
available compliant to Appendix A of MIL-PRF-38535.
PIN CONFIGURATION
TOP VIEW
A0
A1
A2
A3
A4
CS
I/O1
I/O2
I/O3
I/O4
V
CC
V
SS
I/O5
I/O6
I/O7
I/O8
WE
A5
A6
A7
A8
A9
PIN DESCRIPTION
A
0-17
LB (I/O
1-8
)
UB (I/O
9-16
)
I/O
1-16
CS
OE
WE
V
CC
V
SS
NC
Address Inputs
Lower-Byte Control (I/O
1-8
)
Upper-Byte Control (I/O
9-16
)
Data Input/Output
Chip Select
Output Enable
Write Enable
+5.0V Power
Ground
No Connection
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A17
A16
A15
OE
UB
LB
I/O16
I/O15
I/O14
I/O13
V
SS
V
CC
I/O12
I/O11
I/O10
I/O9
NC
A14
A13
A12
A11
A10
September 2000 Rev. 7
1
White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520
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