• 1N746AUR-1 THRU 1N759AUR-1 AVAILABLE IN
JAN, JANTX
AND
JANTXV
PER MIL-PRF-19500/127
• 1N4370AUR-1 THRU 1N4372AUR-1 AVAILABLE IN
JAN, JANTX
AND
JANTXV
PER MIL-PRF-19500/127
• LEADLESS PACKAGE FOR SURFACE MOUNT
• METALLURGICALLY BONDED
1N746AUR-1 thru 1N759AUR-1
and
1N4370AUR-1 thru 1N4372AUR-1
and
CDLL746 thru CDLL759A
and
CDLL4370 thru CDLL4372A
MAXIMUM RATINGS
Operating Temperature: -65°C to +175°C
Storage Temperature: -65°C to +175°C
DC Power Dissipation: 500 mW @ TEC = +125°C
Power Derating: 10 mW / °C above TEC = +125°C
Forward Voltage @ 200mA: 1.1 volts maximum
ELECTRICAL CHARACTERISTICS @ 25°C
CDI
TYPE
NUMBER
(NOTE 1)
NOMINAL
ZENER
VOLTAGE
VZ @ 1ZT
(NOTE 2)
VOLTS
2.4
2.7
3.0
3.3
3.6
3.9
4.3
4.7
5.1
5.6
6.2
6.8
7.5
8.2
9.1
10.0
12.0
ZENER
TEST
CURRENT
1ZT
mA
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
MAXIMUM
ZENER
IMPEDANCE
(NOTE 3)
ZZT @ 1ZT
OHMS
30
30
29
28
24
23
22
19
17
11
7
5
6
8
10
17
30
IR @ VR
1ZM
mA
155
140
125
120
110
100
90
85
75
70
65
60
55
50
45
40
35
MAXIMUM
REVERSE CURRENT
MAXIMUM
ZENER
CURRENT
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
D
1.60
1.70 0.063 0.067
F
0.41
0.55 0.016 0.022
G
3.30
3.70 .130 .146
G1
2.54 REF.
.100 REF.
S
0.03 MIN.
.001 MIN.
µ
A
100
60
30
5
3
2
2
5
5
5
5
2
2
1
1
1
1
VOLTS
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.5
2.0
2.5
3.5
4.0
5.0
6.0
7.0
8.0
9.0
CDLL4370A
CDLL4371A
CDLL4372A
CDLL746A
CDLL747A
CDLL748A
CDLL749A
CDLL750A
CDLL751A
CDLL752A
CDLL753A
CDLL754A
CDLL755A
CDLL756A
CDLL757A
CDLL758A
CDLL759A
FIGURE 1
DESIGN DATA
CASE:
DO-213AA, Hermetically sealed
glass case. (MELF, SOD-80, LL34)
LEAD FINISH:
Tin / Lead
THERMAL RESISTANCE: (R
OJEC):
100 ˚C/W maximum at L = 0 inch
THERMAL IMPEDANCE: (Z
OJX): 25
˚C/W maximum
POLARITY:
Diode to be operated with
the banded (cathode) end positive.
MOUNTING POSITION:
Any.
MOUNTING SURFACE SELECTION:
The Axial Coefficient of Expansion
(COE) Of this Device is Approximately
+6PPM/°C. The COE of the Mounting
Surface System Should Be Selected To
Provide A Suitable Match With This
Device.
NOTE 1
NOTE 2
NOTE 3
Zener voltage tolerance on "A" suffix is +5%. No Suffix denotes + 10% tolerance.
"C" suffix denotes + 2% tolerance and "D" suffix denotes + 1% tolerance.
Zener voltage is measured with the device junction in thermal equilibrium at an ambient
temperature of 25°C, +3°C.
Zener impedance is derived by superimposing on 1ZT A 60Hz rms a.c. current equal
to 10% of 1ZT.
22 COREY STREET, MELROSE, MASSACHUSETTS 02176
PHONE (781) 665-1071
FAX (781) 665-7379
WEBSITE: http://www.cdi-diodes.com
E-mail: mail@cdi-diodes.com
FPGA/CPLD
京公网安备 11010802033920号
EEWORLD
