AM26LS32AC, AM26LS32AI, AM26LS33AC,
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115D – OCTOBER 1980 – REVISED MARCH 2002
D
D
D
D
D
D
D
D
D
D
AM26LS32A Devices Meet or Exceed the
Requirements of ANSI TIA/EIA-422-B,
TIA/EIA-423-B, and ITU Recommendations
V.10 and V.11
AM26LS32A Devices Have
±7-V
Common-Mode Range With
±200-mV
Sensitivity
AM26LS33A Devices Have
±15-V
Common-Mode Range With
±500-mV
Sensitivity
Input Hysteresis . . . 50 mV Typical
Operate From a Single 5-V Supply
Low-Power Schottky Circuitry
3-State Outputs
Complementary Output-Enable Inputs
Input Impedance . . . 12 kΩ Min
Designed to Be Interchangeable With
Advanced Micro Devices AM26LS32 and
AM26LS33
AM26LS32AC . . . D, N, OR NS PACKAGE
AM26LS32AI, AM26LS33AC . . . D OR N PACKAGE
AM26LS32AM, AM26LS33AM . . . J PACKAGE
(TOP VIEW)
1B
1A
1Y
G
2Y
2A
2B
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
4B
4A
4Y
G
3Y
3A
3B
AM26LS32AM, AM26LS33AM . . . FK PACKAGE
(TOP VIEW)
1A
1B
NC
V
CC
4B
1Y
G
NC
2Y
2A
3
4
5
6
7
8
2 1 20 19
18
17
16
15
14
9 10 11 12 13
description
The AM26LS32A and AM26LS33A devices are
quadruple differential line receivers for balanced
and unbalanced digital data transmission. The
enable function is common to all four receivers
and offers a choice of active-high or active-low
input. The 3-state outputs permit connection
directly to a bus-organized system. Fail-safe
design ensures that, if the inputs are open, the
outputs always are high.
4A
4Y
NC
G
3Y
NC – No internal connection
Compared to the AM26LS32 and the AM26LS33, the AM26LS32A and AM26LS33A incorporate an additional
stage of amplification to improve sensitivity. The input impedance has been increased, resulting in less loading
of the bus line. The additional stage has increased propagation delay; however, this does not affect
interchangeability in most applications.
The AM26LS32AC and AM26LS33AC are characterized for operation from 0°C to 70°C. The AM26LS32AI is
characterized for operation from –40°C to 85°C. The AM26LS32AM and AM26LS33AM are characterized for
operation over the full military temperature range of –55°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
AM26LS32 and AM26LS33 are trademarks of Advanced Micro Devices, Inc.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
2002, Texas Instruments Incorporated
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
2B
GND
NC
3B
3A
1
AM26LS32AC, AM26LS32AI, AM26LS33AC,
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115D – OCTOBER 1980 – REVISED MARCH 2002
FUNCTION TABLE
(each receiver)
DIFFERENTIAL
A–B
VID
≥
VIT
IT+
VIT
≤
VID
≤
VIT+
IT
IT–
VID
≤
VIT
IT–
X
Open
ENABLES
G
H
X
H
X
H
X
L
H
X
G
X
L
X
L
X
L
H
X
L
OUTPUT
Y
H
H
?
?
L
L
Z
H
H
H = high level, L = low level, ? = indeterminate,
X = irrelevant, Z = high impedance (off)
logic diagram (positive logic)
G
G
1A
1B
2A
2B
3A
3B
4A
4B
4
12
2
1
6
7
10
9
14
15
3
1Y
5
2Y
11
3Y
13
4Y
2
POST OFFICE BOX 655303
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DALLAS, TEXAS 75265
AM26LS32AC, AM26LS32AI, AM26LS33AC,
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115D – OCTOBER 1980 – REVISED MARCH 2002
schematics of inputs and outputs
EQUIVALENT OF EACH
DIFFERENTIAL INPUT
VCC
EQUIVALENT OF EACH ENABLE INPUT
VCC
8.3 kΩ
NOM
TYPICAL OF ALL OUTPUTS
VCC
85
Ω
NOM
100 kΩ
A Input Only
20 kΩ
NOM
Input
100 kΩ
B Input Only
960
Ω
NOM
960
Ω
NOM
Enable
Output
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage, V
CC
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, V
I
: Any differential input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±25
V
Other inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Differential input voltage, V
ID
(see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±25
V
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Package thermal impedance,
θ
JA
(see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
Case temperature for 60 seconds, T
C
: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package . . . . . . . . . . . . . . . . . . . . . 300°C
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the network ground terminal.
2. Differential voltage values are at the noninverting (A) input terminals with respect to the inverting (B) input terminals.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
DISSIPATION RATING TABLE
PACKAGE
FK
J
TA
≤
25°C
POWER RATING
1375 mW
1375 mW
DERATING FACTOR
ABOVE TA = 25°C
11.0 mW/°C
11.0 mW/°C
TA = 70°C
POWER RATING
880 mW
880 mW
TA = 125°C
POWER RATING
275 mW
275 mW
POST OFFICE BOX 655303
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3
AM26LS32AC, AM26LS32AI, AM26LS33AC,
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115D – OCTOBER 1980 – REVISED MARCH 2002
recommended operating conditions
MIN
VCC
VIH
VIL
VIC
IOH
IOL
TA
Supply voltage
High-level input voltage
Low-level input voltage
Common-mode
Common mode input voltage
High-level output current
Low-level output current
AM26LS32AC, AM26LS33AC
Operating free-air temperature
AM26LS32AI
AM26LS32AM, AM26LS33AM
0
–40
–55
AM26LS32A
AM26LS33A
AM26LS32AC, AM26LS32AI, AM26LS33AC
AM26LS32AM, AM26LS33AM
4.75
4.5
2
0.8
±7
±15
–440
8
70
85
125
°C
NOM
5
5
MAX
5.25
5.5
UNIT
V
V
V
V
µA
mA
electrical characteristics over recommended ranges of V
CC
, V
IC
, and operating free-air
temperature (unless otherwise noted)
PARAMETER
VIT
IT+
VIT
IT–
Vhys
VIK
Positive-going
g g
input threshhold voltage
Negative-going
g
g g
input threshhold voltage
Hysteresis voltage
(VIT+ – VIT–)
Enable-input clamp voltage
TEST CONDITIONS
VO = VOHmin IOH = –440
µA
min,
440
VO = 0 45 V IOL = 8 mA
0.45 V,
AM26LS32A
AM26LS33A
AM26LS32A
AM26LS33A
–0.2‡
–0.5‡
50
VCC = MIN,
VCC =MIN, VID = 1 V,
,
,
VI(G) = 0.8 V, IOH = –440
µA
VCC = MIN, VID = –1 V,
,
,
VI(G) = 0.8 V
VCC = MAX
VI = 15 V,
VI = –15 V,
VI = 5.5 V
VI = 2.7 V
VI = 0.4 V
VIC = –15 V to 15 V,
VCC = MAX
One input to ac ground
12
–15
15
–85
II = –18 mA
AM26LS32AC
AM26LS33AC
AM26LS32AM, AM26LS32AI,
AM26LS33AM
IOL = 4 mA
IOL = 8 mA
VO = 2.4 V
VO = 0.4 V
Other input at –10 V to 15 V
Other input at –15 V to 10 V
–1.5
2.7
V
2.5
0.4
0.45
20
–20
1.2
–1.7
100
20
–0.36
mA
µA
µA
mA
kΩ
mA
V
MIN
TYP†
MAX
0.2
0.5
UNIT
V
V
mV
V
VOH
High level output voltage
High-level
VOL
Low level output voltage
Low-level
Off-state
(high-impedance
(high impedance state)
output current
Line input current
Enable input current
High-level enable current
Low-level enable current
Input resistance
Short-circuit output current§
IOZ
µA
II
II(EN)
IIH
IIL
rI
IOS
ICC
Supply current
VCC = MAX,
All outputs disabled
52
70
mA
† All typical values are at VCC = 5 V, TA = 25°C, and VIC = 0.
‡ The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for threshold levels
only.
§ Not more than one output should be shorted to ground at a time, and duration of the short circuit should not exceed one second.
4
POST OFFICE BOX 655303
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DALLAS, TEXAS 75265
AM26LS32AC, AM26LS32AI, AM26LS33AC,
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115D – OCTOBER 1980 – REVISED MARCH 2002
switching characteristics, V
CC
= 5 V, T
A
= 25°C
PARAMETER
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
Output enable time to high level
Output enable time to low level
Output disable time from high level
Output disable time from low level
TEST CONDITIONS
CL = 15 pF
pF,
CL = 15 pF
pF,
CL = 5 pF
pF,
See Figure 1
See Figure 1
See Figure 1
MIN
TYP
20
22
17
20
21
30
MAX
35
35
22
25
30
40
UNIT
ns
ns
ns
PARAMETER MEASUREMENT INFORMATION
VCC
Test
Point
From Output
Under Test
CL
(see Note A)
RL = 2 kΩ
S1
2.5 V
Input
0
tPLH
Output
tPHL
VOH
1.3 V
S1 and S2 Closed
TEST CIRCUIT
VOLTAGE WAVEFORMS FOR tPLH, tPHL
1.3 V
VOL
0
–2.5 V
5 kΩ
See Note B
S2
≤5
ns
90%
Enable G
10%
See Note C
90%
1.3 V
Enable G
tPZH
Output
S1 Open
S2 Closed
1.3 V
tPHZ
VOLTAGE WAVEFORMS FOR tPHZ, tPZH
10%
10%
1.3 V
90%
1.3 V
≤5
ns
3V
Enable G
10%
0
3V
10%
≤5
ns
90%
1.3 V
90%
1.3 V
≤5
ns
3V
10%
See Note C
0
3V
90%
1.3 V
90%
Enable G
1.3 V
10%
tPZL
10%
90%
1.3 V
0
0.5 V
VOH
Output
S1 Closed
S2 Closed
tPLZ
0.5 V
0
≈1.4
V
VOL
1.3 V
≈1.4
V
S1 Closed
S2 Closed
S1 Closed
S2 Open
VOLTAGE WAVEFORMS FOR tPLZ, tPZL
NOTES: A. CL includes probe and jig capacitance.
B. All diodes are 1N3064 or equivalent.
C. Enable G is tested with G high; G is tested with G low.
Figure 1
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5