AC ’97 SoundMAX
®
Codec
AD1985
AC ’97 2.3 COMPLIANT FEATURES
6 DAC channels for 5.1 surround
Greater than 90 dB dynamic range
20-bit resolution on all DACs
S/PDIF Output
Integrated stereo headphone amplifiers
Variable rate audio
Double rate audio (f
S
= 96 kHz)
Line-level mono phone input
High quality CD mixer input
Selectable MIC input with preamp
AUX and line in stereo inputs
External amplifier power down (EAPD)
Power management modes
Jack sensing and peripheral enumeration/identification
48-lead LQFP package
ENHANCED FEATURES
Integrated parametric equalizer (EQ)
Stereo microphone with preamplifiers
Integrated PLL for system clocking
Variable sample rate 7 kHz to 96 kHz
7 kHz to 48 kHz in 1 Hz increments
96 kHz for double rate audio
Advanced jack sense with auto topology switching
Software enabled V
REFOUT
for microphones and external
power amp
Software enabled outputs for jack sharing
Auto down-mix and channel spreading
Microphone to mono output
Stereo microphone analog passthrough to outputs
Built-in stereo microphone and Center/LFE pin sharing
Selectable Center/LFE tip/ring swapping to support various
speaker products
FUNCTIONAL BLOCK DIAGRAM
V
REFOUT
OMS
V
REF
Z
G
VOLTAGE
REFERENCE
CODEC CORE
PCM L/R
ADC RATE
16-BIT
Σ-∆
ADC
16-BIT
Σ-∆
ADC
PCM C/LFE
DAC RATE
XTL_OUT XTL_IN SPDIF_OUT
MIC1
MIC2
PHONE_IN
CD_L
CD_GND
CD_R
AUX_L
AUX_R
LINE_IN_L
LINE_IN_R
AD1985
G
2CMIC
MS
G
SPDIF
TX
OMS
PLL
ADC
SLOT
LOGIC
AC '97 INTERFACE V2.3
RECORD
SELECTOR
ID0
CD
DIFF AMP
G
G
M
M
ID1
RESET
LFE_OUT
MZ
A
SPRD
M
GA
20-BIT
Σ-∆
DAC
20-BIT
Σ-∆
DAC
CSWP
DAC
SLOT
LOGIC
SYNC
CENTER_OUT
MZ
A
LOSEL
SPRD
M
GA
M M M
GA
M
GA
M
GA
M
GA
M
GA
M
GA
M
GA
M
M
A
GA
M M M
GA
CSWP
BITCLK
LINE_OUT_L
MZ
A
EQ COEF STORAGE
MONO_OUT
M
A
MIX
PC BEEP
GENERATOR
PCM FRONT
DAC RATE
20-BIT
Σ-∆
DAC
20-BIT
Σ-∆
DAC
20-BIT
Σ-∆
DAC
20-BIT
Σ-∆
DAC
PCM SURR
DAC RATE
BYPASS
SDATA_OUT
LOSEL
EQ
SDATA_IN
LINE_OUT_R
MZ
A
BYPASS
Σ
HPSEL
Σ
Σ
M
M
M
M
M
GA
GA
GA
GA
SURR_OUT_L/
HP_OUT_L
SURR_OUT_R/
HP_OUT_R
HP M
A
EQ
AC '97
CONTROL
REGISTERS
ANALOG MIXING
CONTROL
EAPD JACK SENSE
HP M
A
HPSEL
EAPD JS0 JS1 JS2 JS3
Figure 1.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2004 Analog Devices, Inc. All rights reserved.
03610-A-001
G = GAIN
A = ATTENUATION
M = MUTE
Z = HIGH Z
M
AD1985
TABLE OF CONTENTS
Detailed Functional Block Diagram .............................................. 3
Specifications..................................................................................... 4
Analog Input ................................................................................. 4
Master Volume .............................................................................. 4
Programmable Gain Amplifier—ADC...................................... 4
Analog Mixer—Input Gain/Amplifiers/Attenuators............... 5
Digital Decimation and Interpolation Filters ........................... 5
Analog-to-Digital Converters..................................................... 5
Digital-to-Analog Converters..................................................... 5
Analog Output .............................................................................. 6
Static Digital Specifications......................................................... 6
Power Supply................................................................................. 6
Power-Down States ...................................................................... 7
Clock Specifications ..................................................................... 7
Timing Parameters ....................................................................... 8
Absolute Maximum Ratings.......................................................... 10
Environmental Conditions........................................................ 10
ESD Caution................................................................................ 10
Pin Configuration and Functional Descriptions........................ 11
Pin Descriptions ......................................................................... 11
Indexed Control Registers......................................................... 13
Outline Dimensions ....................................................................... 47
Ordering Guide........................................................................... 47
REVISION HISTORY
3/04—Data Sheet changed from Rev. 0 to Rev. A
Updated Format.................................................................Universal
Changes to Figure 1......................................................................... 1
Changes to Figure 2......................................................................... 3
Changes to Table 4........................................................................... 4
Changes to Tables 5, 7, and 8.......................................................... 5
Changes to Table 12 ........................................................................ 7
Changes to Pin Configuration..................................................... 11
Changes to Circuit Layout Note .................................................. 11
Changes to Indexed Control Registers ....................................... 13
Changes to Master Volume Register (Index 0x02).................... 15
Changes to Headphone Volume Register (Index 0x04) ........... 16
Changes to Mono Volume Register (Index 0x06) ..................... 17
Changes to PC Beep Register (Index 0x0A) .............................. 18
Changes to Microphone Volume Register (Index 0x0E).......... 19
Changes to AUX In Volume Register (Index 0x16) .................. 21
Changes to Record Select Control Register (Index 0x1A)....... 22
Changes to Record Gain Register (Index 0x1C) ....................... 23
Changes to Extended Audio ID Register (Index 0x28) ............ 27
Changes to Center/LFE Volume Control
Register (Index 0x36).................................................................... 30
Changes to Surround Volume Control Register
(Index 0x38) ................................................................................... 31
Changes to Jack Sense/Audio Interrupt/Status Register
(Index 0x72) ................................................................................... 36
Changes to Miscellaneous Control Bits (Index 0x76) .............. 39
Changes to Advanced Jack Sense Register (Index 0x78).......... 41
Updated Outline Dimensions...................................................... 47
Updated Ordering Guide.............................................................. 47
3/03—Revision 0: Initial Version
Rev. A | Page 2 of 48
VREFOUT:
0x76 D3-D2
DEF=00 (+2.25V)
OMS:
0x74 D9
DEF=0(MIC_1/2)
M20:
0x0E D6
DEF=0 (0dB Gain)
+2.25V
MGB[1:0]:
0x76 D1-D0
DEF=0 (+20dB)
2CMIC:
0x76 D7
DEF=0 (MS Sel)
MS:
0x20 D8
DEF=0 (MIC_1)
V
REFOUT
00=
01=
10=
11=
+2.25V
HIGH Z
+3.7V
0V
V
REF
XTL_OUT
XTL_IN SPDIF_OUT
MIC1
G
SPDIF
TX
G
REC SELECTOR
0x1A
D2-D0 RIGHT
D10-D8 LEFT
DEF=0x000
REC GAIN:
0x1C
0dB to +22.5dB
DEF=0x8000 0dB/MUTED
PCM ADC RATE:
0x32
7kHz-48kHz in 1Hz steps
DEF 0xBB80 48kHz
0
AD1985
Z
CODEC CORE
PLL
G
VOLTAGE
REFERENCE
PHONE_IN
CD
DIFF AMP
G
M
Left
OMS
1
2CMIC
MS
MIC2
0
OMS
1
00=
01=
10=
11
+20dB Gain
+10dB Gain
+30dB Gain
(reserved)
CD_L
16-BIT
Σ-∆
ADC
16-BIT
Σ-∆
ADC
ADC
SLOT
LOGIC
ID0
CD_GND
CD_R
G
M
Right
AUX_L
ID1
AUX_R
LINE_IN_L
AC97 MODE:
0x18
ADI MODE:
PCM VOL 0x36
+12dB to -34.5dB
DEF 0x8808 0dB/MUTED
PCM C/LFE DAC RATE:
0x30
7kHz-48kHz in 1Hz steps
DEF 0xBB80 48kHz
1
000=
001=
010=
011=
100=
101=
110=
111=
DSA:
0x28
D5-D4
DEF 00
MIC
CD
---
AUX
LINE_IN
STR_MIX
MON_MIX
PHONE
LINE_IN_R
RESET
SPRD:
0x76 D6
AC97 MODE:
C&LFE VOL 0x36
DEF=0 (NoSprd)
ADI MODE:
MASTER VOL 0x02
0dB to -46.5dB
0
LFE Right
DEF 0x8000 0dB/MUTED
LINE_IN VOL:
0x10 +12 to -34.5dB
DEF=0x8808 0dB/MUTED
SYNC
0
SPRD
LFE_OUT
1
LFE Right
DOWN MIX:
0x76
DMIX 1,0 (D9,D8)
DEF=0x0 (MUTED)
DOWN MIX:
0x76
DMIX 1,0 (D9,D8)
DEF=0x0 (MUTED)
0
MIC VOL:
0x0E
+12 to -34.5dB
DEF=0x8808
0dB/MUTED
MZ
A
CSWP
M
GA
20-BIT
Σ-∆
DAC
DAC
SLOT
LOGIC
1
AC '97 INTERFACE V2.3
DETAILED FUNCTIONAL BLOCK DIAGRAM
BITCLK
0
OMS:
0x74 D9
DEF=0(MIC_1/2)
CLDIS:
0x76 D11
DEF=0(enabled)
SPRD
Center Left
GA
Center Left
GA
GA
M
M
M
M
AUX VOL:
0x16
+12 to -34.5dB
DEF=0x8808
0dB/MUTED
+0 to -45dB
DEF=0x8000 0dB/MUTED
GA
GA
M
M
M
GA
M
M
GA
GA
GA
LODIS:
0x76 D12
DEF=0 (enabled)
PHONE VOL:
0x0C
+12 to -34.5dB
DEF=0x8008
0dB/MUTED
Left
LOSEL
MIX
LODIS:
0x76 D12
DEF=0 (enabled)
Σ
Σ
M
DOWN MIX:
0x76
DMIX 1,0 (D9,D8)
DEF=0x0 (MUTED)
Left
20-BIT
Σ-∆
DAC
M
M
GA
GA
Right
EQB
Σ
1
0
BYPASS
Right
LOSEL
0
1
0
20-BIT
Σ-∆
DAC
EQ
1
BYPASS
AC97 MODE:
SURR VOL
0x38
ADI MODE:
HEADPHONE VOL 0x04
0dB to -46.5dB
DEF 0x8000 0dB/MUTED
Left
HPSEL
SURR_OUT_L/
HP_OUT_L
A
1
HP
M
AC97 MODE:
0x18
ADI MODE:
PCM VOL 0x38
PCM SURR DAC RATE:
0x2E
7kHz-48kHz in 1Hz steps
+12dB to -34.5dB
DEF 0x8808 0dB/MUTED DEF 0xBB80 48kHz
AC '97
CONTROL
REGISTERS
Note:
Setting to enable Surround 5.1 is LOSEL=1
M
M
M
GA
GA
20-BIT
Σ-∆
DAC
20-BIT
Σ-∆
DAC
EAPD:
0x26 D15
DEF=0 (Enabled)
JSENSE:
0x72
DEF=0x0000
SURR_OUT_R/
HP_OUT_R
0
HPSEL:
0x76 D10
DEF=0 (Surround)
Right
HPSEL
HP
M
A
HP STBY:
PR6
reg 0x26 D14
1=power down, DEF=0
G = GAIN
A = ATTENUATION
M = MUTE
Z = HIGH Z
EAPD
ANALOG MIXING
CONTROL
JACK SENSE
AD1985
03610-A-002
EAPD JS0 JS1 JS2 JS3
EQ COEF STORAGE
Figure 2. Detailed Functional Block Diagram
M
M
AUX VOL:
0x16
+12 to -34.5dB
DEF=0x8808
0dB/MUTED
1
Rev. A | Page 3 of 48
A
1
LINE_OUT:
MASTER VOL 0x02
0dB to -46.5dB
DEF=0x8000 0dB/MUTED
1
0
LOSEL:
0x76 D5
DEF=0 (Mixer)
M
M
CSWP:
0x74 D3
DEF=0 (NoCSwp)
LINE_OUT_L
MZ
A
MONO_OUT:
MONO VOL 0x06
0dB to -46.5dB
DEF=0x8000 0dB/MUTED
MIX:
0x20 D9
DEF=0 (Mixer)
PCBeep:
0x0A Vol: D4-D0
Mute: D15
Frequency: D12-D5
MONO_OUT
A
0
M
CD VOL:
0x012 +12 to -34.5dB
DEF=0x8008 0dB/MUTED
CSWP
CENTER_OUT
MZ
M
GA
20-BIT
Σ-∆
DAC
SDATA_OUT
M
A
PC BEEP
GENERATOR
PCM VOL:
0x18
+12dB to -34.5dB
DEF 0x8808 0dB/MUTED
PCM FRONT DAC RATE:
0x2C
7kHz-48kHz in 1Hz steps
DEF 0xBB80 48kHz
EQB:
0x72 D9-D8
DEF=0 (EQ Enabled)
0
LINE_OUT:
MASTER VOL 0x02
0dB to -46.5dB
DEF=0x8000 0dB/MUTED
1
LOSEL:
0x76 D5
DEF=0 (Mixer)
EQ
SDATA_IN
LINE_OUT_R
A
MZ
AD1985
SPECIFICATIONS
Table 1. Test Conditions, Unless Otherwise Noted
Parameter
TEMPERATURE
DIGITAL SUPPLY (DV
DD
)
ANALOG SUPPLY (AV
DD
)
SAMPLE RATE (f
S
)
INPUT SINE WAVE SIGNAL
ANALOG OUTPUT PASS BAND
DAC TEST CONDITIONS
Value/Condition
Unit
25
°C
3.3
V
5.0
V
48
kHz
1,008
Hz
20 to 20,000
Hz
Calibrated
Output –3 dB relative to full scale
10 kΩ output load: line
32 Ω output load: headphone
2 kΩ output load: center and LFE
47.5 kΩ output load: mono
Calibrated
0 dB PGA gain
Input –3 dB relative to full scale
24.576 MHz
ADC TEST CONDITIONS
CLOCK
ANALOG INPUT
Table 2.
Parameter
INPUT VOLTAGE
LINE_IN, CD, AUX, PHONE_IN
MIC_IN with +30 dB Preamp
MIC_IN with +20 dB Preamp
MIC_IN with +10 dB Preamp
MIC_IN with 0 dB Preamp
Input Impedance
1
Input Capacitance
1
Min
Typ
1
2.83
0.032
0.089
0.1
0.283
0.316
0.894
1
2.83
20
5
Max
Unit
V rms
V p-p
V rms
V p-p
V rms
V p-p
V rms
V p-p
V rms
V p-p
kΩ
pF
7.5
MASTER VOLUME
Table 3.
Parameter
STEP SIZE (LINE OUT, MONO OUT, SURROUND OUT, CENTER, LFE)
OUTPUT ATTENUATION RANGE (0 dB TO −46.5 dB)
MUTE ATTENUATION OF 0 dB FUNDAMENTAL
1
Min
Typ
1.5
46.5
Max
Unit
dB
dB
dB
80
PROGRAMMABLE GAIN AMPLIFIER—ADC
Table 4.
Parameter
STEP SIZE (0 dB TO +22.5 dB)
PGA GAIN RANGE
Min
Typ
1.5
22.5
Max
Unit
dB
dB
1
Guaranteed, not tested.
Rev. A | Page 4 of 48
AD1985
ANALOG MIXER—INPUT GAIN/AMPLIFIERS/ATTENUATORS
Table 5.
Parameter
SIGNAL-TO-NOISE RATIO (SNR)
CD to LINE_OUT
LINE, AUX, PHONE, to LINE_OUT
MIC1 or MIC2 to LINE_OUT
Step Size: All Mixer Inputs, Except PC Beep
Input Gain/Attenuation Range (+12 dB to –34.5 dB): All Mixer Inputs, Except PC Beep
Min
Typ
90
85
80
1.5
46.5
Max
Unit
dB
dB
dB
dB
dB
DIGITAL DECIMATION AND INTERPOLATION FILTERS
1
Table 6.
Parameter
PASS BAND
PASS-BAND RIPPLE
TRANSITION BAND
STOP BAND
STOP-BAND REJECTION
GROUP DELAY
GROUP DELAY VARIATION OVER PASS BAND
Min
0
0.4 ×
f
S
0.6 ×
f
S
–74
16/f
S
0
Typ
Max
0.4 × f
S
±0.09
0.6 × f
S
∞
Unit
Hz
dB
Hz
Hz
dB
s
µs
ANALOG-TO-DIGITAL CONVERTERS
Table 7.
Parameter
RESOLUTION
TOTAL HARMONIC DISTORTION (THD)
DYNAMIC RANGE (–60 dB IN; THD+N REFERENCED TO FULL-SCALE; A-WEIGHTED)
SIGNAL-TO-INTERMODULATION DISTORTION (CCIF METHOD)
1
ADC CROSSTALK
1
Line Inputs (Input L, Ground R, Read R; Input R, Ground L, Read L)
LINE_IN to Other
GAIN ERROR (FULL-SCALE SPAN RELATIVE TO NOMINAL INPUT VOLTAGE)
INTERCHANNEL GAIN MISMATCH (DIFFERENCE OF GAIN ERRORS)
ADC OFFSET ERROR
1
Min
Typ
16
−85
84
85
−85
−95
±10
±0.5
±5
Max
Unit
Bits
dB
dB
dB
dB
dB
%
dB
mV
DIGITAL-TO-ANALOG CONVERTERS
Table 8.
Parameter
RESOLUTION
TOTAL HARMONIC DISTORTION (THD); LINE_OUT, C/LFE
TOTAL HARMONIC DISTORTION (THD); HP_OUT
DYNAMIC RANGE (–60 dB IN; THD+N REFERENCED TO FULL-SCALE; A-WEIGHTED)
SIGNAL-TO-INTERMODULATION DISTORTION (CCIF METHOD)
1
GAIN ERROR (OUTPUT FULL-SCALE VOLTAGE RELATIVE TO NOMINAL OUTPUT FULL-SCALE VOLTAGE)
2
INTERCHANNEL GAIN MISMATCH (DIFFERENCE OF GAIN ERRORS)
DAC CROSSTALK (INPUT L, ZERO R, READ R_OUT; INPUT R, ZERO L, READ L_OUT)
1
TOTAL OUT-OF-BAND ENERGY (MEASURED FROM 0.6 × f
S
TO 100 KHZ)
1
Min
Typ
20
–90
–75
90
100
±10
–100
–85
Max
Unit
Bits
dB
dB
dB
dB
%
dB
dB
dB
±0.7
1
2
Guaranteed, not tested.
C/LFE specified with 10 kΩ load.
Rev. A | Page 5 of 48
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