Link’s proprietary analog and digital Phase Locked
Loop techniques, this IC can produce up to a
160MHz output.
BLOCK DIAGRAM
S3
S2
S1
S0
ROM Based
Multipliers
VCO
Divider
Reference
Divider
Phase
Comparator
Charge
Pump
Loop
Filter
VCO
CLK
OE
XIN
XOUT
XTAL
OSC
REFEN
REFOUT
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/03/04 Page 1
PLL601-01
Low Phase Noise PLL Clock Multiplier
PIN DESCRIPTIONS
Name
CLK
REFEN
VDD
XOUT
S1
XIN
S2
S3
S0
OE
REFOUT
GND
Number
1
2
3,4,5
6
7
8
9
10
11
12
13
14,15,16
Type
O
I
P
O
I
I
I
I
I
I
O
P
Description
Clock output. Equals the input frequency times selected multiplier.
Reference clock enable. When Low, it disables REFOUT. When High, it
enables REFOUT.
Power Supply.
Crystal output.
Multiplier Select Pin 1. Determines CLK output. Has internal pull-up.
Crystal input to be connected to 10-27MHz fundamental parallel mode crys-
tal (C
L
=15pF). On chip load capacitors: No external capacitor required.
Multiplier Select Pin 2. Determines CLK output. Has internal pull-up.
Multiplier Select Pin 3. Determines CLK output. Has internal pull-up.
Multiplier Select Pin 0. Determines CLK output. Has internal pull-up.
Output Enable. Tri-state CLK and REFOUT when low. Has internal pull-up.
Buffered crystal oscillator clock output. Controlled by REFEN.
Ground.
MULTIPLIER SELECT TABLE
S3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
S2
0
0
0
0
1
1
1
1
0
0
0
1
1
1
1
S1
0
0
1
1
0
0
1
1
0
1
1
0
0
1
1
S0
0
1
0
1
0
1
0
1
0
0
1
0
1
0
1
CLK
Test
Input x 11
Input x 1
Input x 3
Input x 4
Input x 5
Input x 6
Input x 8
Input x 7
Input x 2
Input x 9
Input x 8
Input x 10
Input x 12
Input x 16
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/03/04 Page 2
PLL601-01
Low Phase Noise PLL Clock Multiplier
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
Supply Voltage
Input Voltage, dc
Output Voltage, dc
Storage Temperature
Ambient Operating Temperature*
Junction Temperature
Lead Temperature (soldering, 10s)
ESD Protection, Human Body Model
SYMBOL
V
DD
V
I
V
O
T
S
T
A
T
J
MIN.
-0.5
-0.5
-65
-40
MAX.
4.6
V
DD
+0.5
V
DD
+0.5
150
85
125
260
2
UNITS
V
V
V
°C
°C
°C
°C
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other con-
ditions above the operational limits noted in this specification is not implied.
*
Note:
Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. AC Specifications
PARAMETERS
Input Frequency
Output Frequency
Output Rise Time
Output Fall Time
Duty Cycle
CONDITIONS
Fundamental parallel resonance
At 3.3V
0.8V to 2.0V with no load
2.0V to 0.8V with no load
@ 50% V
DD
MIN.
10
TYP.
MAX.
27
160
1.5
1.5
55
UNITS
MHz
MHz
ns
ns
%
45
50
3. DC Specifications
PARAMETERS
Operating Voltage
Input High Voltage
Input Low Voltage
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage At
CMOS Level
Operating Supply Current
Short-circuit Current
Input Capacitance
SYMBOL
V
DD
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
V
OH
I
DD
I
S
C
IN
CONDITIONS
MIN.
2.97
2
TYP.
MAX.
3.63
0.8
UNITS
V
V
V
V
V
V
V
V
For XIN pin
For XIN pin
I
OH
= -25mA
I
OL
= 25mA
I
OH
= -8mA
No Load
OE, Select Pins
(V
DD
/2)
+
1
2.4
V
DD
/2
V
DD
/2
(V
DD
/2)
−
1
0.4
V
DD
-0.4
35
±50
5
mA
mA
pF
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/03/04 Page 3
PLL601-01
Low Phase Noise PLL Clock Multiplier
4. Crystal Specifications
PARAMETERS
Crystal Resonator Frequency
Crystal Loading Capacitance
Rating
SYMBOL
F
XIN
C
L
(xtal)
CONDITIONS
Parallel Fundamental Mode
MIN.
10
TYP.
MAX.
27
UNITS
MHz
pF
15
5. Jitter Specifications
PARAMETERS
Max. Absolute Jitter, peak-to-peak
Max. Jitter, cycle to cycle
Phase Noise, relative to carrier, 125Mhz(x5)
Phase Noise, relative to carrier, 125Mhz(x5)
Phase Noise, relative to carrier, 125Mhz(x5)
Phase Noise, relative to carrier, 125Mhz(x5)
CONDITIONS
Short term
100 Hz offset
1kHz offset
10kHz offset
100kHz offset
MIN.
TYP.
±100
MAX.
60
UNITS
ps
ps
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
105
125
130
125
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/03/04 Page 4
PLL601-01
Low Phase Noise PLL Clock Multiplier
PACKAGE INFORMATION
16 PIN Narrow SOIC, TSSOP ( mm )
SOIC
Symbol
A
A1
B
C
D
E
H
L
e
Min.
1.35
0.10
0.33
0.19
9.80
3.80
5.80
0.40
1.27 BSC
Max.
1.75
0.25
0.51
0.25
10.00
4.00
6.20
1.27
0.45
Min.
-
0.05
0.19
0.09
4.90
4.30
TSSOP
Max.
1.20
0.15
0.30
0.20
5.10
4.50
6.40 BSC
0.75
0.65 BSC
A1
B
A
C
L
e
D
E
H
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL601-01 S C
PART NUMBER
TEMPERATURE
C=COMMERCIAL
I=INDUSTRAL
PACKAGE TYPE
S=SOIC
O=TSSOP
Order Number
PLL601-01OC
PLL601-01OC-R
PLL601-01SC
PLL601-01SC-R
Marking
P601-01OC
P601-01OC
P601-01SC
P601-01SC
Package Option
16-Pin
16-Pin
16-Pin
16-Pin
TSSOP (Tube)
TSSOP (Tape & Reel)
SOIC (Tube)
SOIC (Tape & Reel)
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information fur-
nished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY:
PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the ex-
press written approval of the President of PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
京公网安备 11010802033920号
EEWORLD
