The AP3842/3/4/5 family of control ICs provides the
necessary features to implement off-line or DC to
DC fixed frequency current mode control schemes
with a minimal external parts count. Internally
implemented circuits include under voltage lockout
featuring start-up current less than 0.5 mA, a
precision reference trimmed for accuracy at the
error amp input, logic to insure latched operation, a
PWM comparator which also provides current limit
control, and a totem pole output stage designed to
source or sink high peak current. The output stage,
suitable for driving N-Channel MOSFETs, is low in
the off-state.
Differences between members of this family are the
under-voltage lockout thresholds and maximum
duty cycle ranges. The AP3842 and AP3844 have
UVLO thresholds of 16V(on) and 10V(off), ideally
suited for off-line applications. The corresponding
thresholds for the AP3843 and AP3845 are 8.5V
and 7.6V. The AP3842 and AP3843 can operate to
duty cycles approaching 100%. A range of the zero
to < 50% is obtained by the AP3844 and AP3845
by the addition of an internal toggle flip flop which
blanks the output off every other clock cycle.
Optimized for Off-Line and DC to DC Converters
Low Start-Up Current (≦0.5mA)
Automatic Feed Forward Compensation
Pulse-by-Pulse Current Limiting
Enhanced Load Response Characteristics
Under-Voltage Lockout (UVLO) with Hysteresis
Double Pulse Suppression
High Current Totem Pole Output
Internally Trimmed Bandgap Reference
Current Mode Operation to 500KHZ
Low Ro Error Amplifier
Pin Connections
PDIP-8L, SOP-8L
Top View
COMP.
V
FB
I
SENSE
R
T
/C
T
1
2
3
4
8
7
6
5
V
REF
V
I
OUTPUT
GROUND
Ordering Information
AP 384X X X X
Part No.
2:3842
3:3843
4:3844
5:3845
Package
S8:SOP-8L
N8:PDIP-8L
Lead Free
Packing
Blank: Tube
Blank : Normal
L : Lead Free Package A : Taping
This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of
this product. No rights under any patent accompany the sale of the product.
Rev.1.0 Oct.11, 2004
1/8
Not Recommended for New Design
AP3842/3/4/5
High Performance Current Mode PWM Controller
Block Diagram
( toggle flip flop used only in AP3844 and AP3845 )
Vi
7
36V
UVLO
GROUND
5
16V
5V
S/R
REF
8
INTERNAL
BIAS
VREF
5V 50mA
2.50V
VREF GOOD
LOGIC
T
2R
R
S
R
1V
CURRENT
SENSE
COMPARATOR
PWM
LATCH
6
RT/CT
4
OUTPUT
OSC.
ERROR AMP.
2
VFB
COMP
CURRENT
SENSE
1
3
AP384X
Absolute Maximum Ratings
Symbol
V
i
V
i
I
o
E
o
P
tot
P
tot
T
stg
T
L
Parameter
Supply Voltage (low impedance source)
Supply Voltage (li < 30mA)
Output Current
Output Energy (capacitive load)
Analog Inputs (pins2,3)
Error Amplifier Output Sink Current
Power Dissipation at T
amb
≦
50
0
C (PDIP8)
Power Dissipation at T
amb
≦
25
0
C (SOP8)
Storage Temperature Range
Lead Temperature (soldering 10s)
Value
36
Self Limiting
±0.7
5
-0.3 to 5.5
10
1.25
800
-65 to 150
260
Unit
V
A
µJ
V
mA
W
mW
o
C
o
C
*Notes: 1. All voltages are with respect to pin 5, all currents are positive into the specified terminal.
Electrical Characteristics
(Unless otherwise stated, these specifications apply for
0≦T
amb
≦70
C for AP384X ; V
i
= 15V(note 5); R
T
= 10KΩ;C
T
= 3.3nF)
o
Symbol
Parameter
Test Conditions
AP384X
Min. Typ. Max.
Unit
REFERENCE SECTION
V
REF
Output Voltage
∆V
REF
Line Regulation
∆V
REF
Load Regulation
∆V
REF/
∆T
Temperature Stability
Total Output Variation
e
N
I
SC
Tj = 25
0
C I
0
=1mA
4.90 5.00 5.10
V
12V
≦
V
i
≦
25V
2
20
mV
1mA
≦
I
o
≦
20mA
3
25
mV
(Notes 2)
0.2 0.4 mV/
0
C
Line, Load, Temperature (Notes 2) 4.82
5.18
V
0
10Hz≦f
≦
10KHz Tj=25 C (Notes
50
µV
Output Noise Voltage
2)
0
Long Term Stability
T
amb
=125 C, 1000Hrs (Notes 2)
5
25
mV
Output Short Circuit current
-85 -120 mA
Anachip Corp.
www.anachip.com.tw
2/8
Rev.1.0 Oct.11, 2004
Not Recommended for New Design
AP3842/3/4/5
High Performance Current Mode PWM Controller
Electrical Characteristics(Continued)
(Unless otherwise stated, these specifications apply for
0≦T
amb
≦70
C for AP384X ; V
i
= 15V(note 5); R
T
= 10KΩ;C
T
= 3.3nF)
o
Symbol
Parameter
Test Conditions
Tj=25
0
C (Notes 6, 7)
12V
≦
V
i
≦
25V
T
MIN
≦
T
amb
≦
T
MAX
(Notes 2)
V
PIN4
Peak to Peak
0
Tj=25 C V
PIN4
=2V
V
PIN1
=2.5V
V
FB
=5V
0V
≦
V
0
≦
4V
Tj=25
o
C
12V
≦
V
i
≦
25V
V
PIN2
=2.7V V
PIN1
=1.1V
V
PIN2
=2.3V V
PIN1
=5V
V
PIN2
=2.3V; R
L
=15KΩ to ground
V
PIN2
=2.7V; R
L
=15KΩ to pin 8
(Notes3&Notes4)
V
PIN1
=5V (Notes3)
12
≦
V
i
≦
25V (Notes3)
AP384X
Min. Typ. Max.
49
52
0.2
0.5
1.6
8.3
55
1
Unit
KHz
%
%
V
mA
V
µA
dB
MHz
dB
mA
mA
V
V
V/V
V
dB
µA
ns
V
V
V
V
ns
ns
V
V
V
V
V
%
%
%
mA
mA
V
OSCILLATOR SECTION
f
s
Oscillator Frequency
Voltage Stability
Temperature Stability
V
4
Amplitude
Discharge Current
ERROR AMP SECTION
V
2
Feedback Input Voltage
I
b
Input Bias Current
A
VOL
B
Unity Gain Bandwidth
Supply Voltage Rejection
SVRR
Ratio
I
O
Output Sink Current
I
O
Output Source Current
V
OUT
High
V
OUT
Low
CURRENT SENSE SECTION
G
v
Gain
V
3
Maximum Input Signal
Supply Voltage Rejection
SVRR
Ratio
I
b
Input Bias Current
Delay to Output
OUTPUT SECTION
V
OL
V
OH
Output Low Level
Output High Level
7.8
8.8
2.42 2.50 2.58
-0.1
-2
65
90
0.7
1
60
2
-0.5
5
70
6
-0.8
7
0.8
3
1
70
-2
150
-10
300
0.4
2.2
1.1
3.15
1.1
2.85
0.9
T
r
Rise Time
T
f
Fall Time
V
OLS
UVLO Saturation
UNDER-VOLTAGE LOCKOUT SECTION
Start Threshold
Min Operating Voltage After
Turn-on
PWM SECTION
Maximum Duty Cycle
Minimum Duty Cycle
TOTAL STANDBY CURRENT
I
st
I
i
V
iz
Start-up Current
Operating Supply Current
Zener Voltage
I
SINK
= 20mA
I
SINK
= 200mA
I
SOURCE
= 20mA
I
SOURCE
= 200mA
Tj=25
0
C C
L
=1nF (Notes2)
Tj=25
0
C C
L
=1nF (Notes2)
Vcc = 6V ; Isink = 1mA
3842/4
3843/5
3842/4
3843/5
3842/3
3844/5
13
12
0.1
1.6
13.5
13.5
50
50
0.1
16
8.4
10
7.6
96
48
150
150
1.1
17.5
9
11.5
8.2
14.5
7.8
8.5
7.0
94
47
50
0
0.5
17
Vi=14V,3842/4 ;
Vi=6.5V 3843/5
V
PIN2
=V
PIN3
=0V
I
i
=25mA
0.3
30
12
36
Anachip Corp.
www.anachip.com.tw
3/8
Rev.1.0 Oct.11, 2004
Not Recommended for New Design
AP3842/3/4/5
High Performance Current Mode PWM Controller
Notes：2.These parameters, although guaranteed, are not 100% tested in production.
3.Parameter measured at trip point of latch with V
PIN2
=0.
4.Gain defined as:
∆V
PIN1
; 0≦V
PIN3
≦0.8V
A=
∆V
PIN3
5.Adjust V
i
above the start threshold before setting at 15V.
6.Output frequency equals oscillator frequency for the AP3842 and AP3843.
7.Output frequency is one and half oscillator frequency for the AP3844 and AP3845.
Figure 1 : Error Amp Configuration.
2.5V
0.8 mA
Zf
Zf
2
COMP
1
V
FB
Error amp can source or sink up to 0.5mA
Figure 2 : Under Voltage Lockout.
ON/OFF COMMAND
TO REST OF IC
I
CC
V
i
7
AP3842 AP3843
AP3844 AP3845
V
<17 mA
ON
16V
10V
8.4V
7.6V
<1 mA
V
V
OFF
OFF
V
ON
V
CC
During Under-Voltage Lockout, the output driver is biased to sink minor amounts of current. Pin 6 should be
shunted to ground with a bleeder resistor to prevent activating the power switch with extraneous leakage
currents.
Figure 3 : Current Sense Circuit.
ERROR
AMP
I
S
2R
COMP
R
C
3
1
CURRENT
SENSE
R
1V
CURRENT
SENSE
COMPARATOR
Rs
5
GND
Anachip Corp.
www.anachip.com.tw
4/8
Rev.1.0 Oct.11, 2004
Not Recommended for New Design
AP3842/3/4/5
High Performance Current Mode PWM Controller
Peak current(i
s
) is determined by the formula
1.0V
I
S
max
≈
R
S
A small RC filter may be required to suppress switch transients.
Figure 4.
V
REF
R
T
/C
T
GROUND
8
R
T
4
C
T
5
for R
T
> 5KΩ f=
1.72
R
T
C
T
Figure 5 : Open Loop Test Circuit.
V
REF
R
T
A
1
COMP.
V
FB
V
REF
4.7K
2N2222
8
7
6
5
0.1
uF
Vi
100K
ERROR AMP.
ADJUST
2
1K
I
SENSE
V
i
5K
AP3842
3
4
I
SENSE
ADJUST
4.7K
OUTPUT
0.1
uF
TW
1K
OUTPUT
R
T/
C
T
GROUND
C
GROUND
T
High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and
bypass apacitors should be connected close to pin 5 in a single point ground. The transistor and 5 KΩ
potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to pin 3.
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