IBM25PPC750FX-DB0132T datasheet, PDF

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IBM25PPC750FX-DB0132T: DescriptionRISC Microprocessor, 32-Bit, 600MHz, CMOS, CBGA292, 21 X 21 MM, 1 MM PITCH, CERAMIC, BGA-292; CategoryMicrocontrollers and processors; File Size452KB，62 Pages; ManufacturerIBM; Websitehttp://www.ibm.com

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IBM25PPC750FX-DB0132T Overview

RISC Microprocessor, 32-Bit, 600MHz, CMOS, CBGA292, 21 X 21 MM, 1 MM PITCH, CERAMIC, BGA-292

IBM25PPC750FX-DB0132T Parametric

Parameter Name	Attribute value
Maker	IBM
Parts packaging code	BGA
package instruction	BGA, BGA292,20X20,40
Contacts	292
Reach Compliance Code	unknown
ECCN code	3A001.A.3
Is Samacsys	N
Address bus width	32
bit size	32
boundary scan	YES
maximum clock frequency	200 MHz
External data bus width	64
Format	FLOATING POINT
Integrated cache	YES
JESD-30 code	S-CBGA-B292
length	21.02 mm
low power mode	YES
Number of terminals	292
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	BGA
Encapsulate equivalent code	BGA292,20X20,40
Package shape	SQUARE
Package form	GRID ARRAY
power supply	1.45,1.8/3.3 V
Certification status	Not Qualified
Maximum seat height	3.087 mm
speed	600 MHz
Maximum supply voltage	1.5 V
Minimum supply voltage	1.4 V
Nominal supply voltage	1.45 V
surface mount	YES
technology	CMOS
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
width	21.02 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC
Base Number Matches	1

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IBM PowerPC

750FX RISC Microprocessor

Datasheet

(Support for 750FX Design Revision Level DD 2.X)

Version: 2.0

Preliminary

June 9, 2003

Printed in the United States of America June 2003

The following are trademarks of International Business Machines Corporation in the United States, or other countries,

or both.

IBM

IBM Logo

PowerPC

PowerPC Logo

PowerPC 750

PowerPC Architecture

RISCWatch

Other company, product and service names may be trademarks or service marks of others.

All information contained in this document is subject to change without notice. The products described in this document

are NOT intended for use in applications such as implantation, life support, or other hazardous uses where malfunction

could result in death, bodily injury, or catastrophic property damage. The information contained in this document does not

affect or change IBM product specifications or warranties. Nothing in this document shall operate as an express or implied

license or indemnity under the intellectual property rights of IBM or third parties. All information contained in this docu-

ment was obtained in specific environments, and is presented as an illustration. The results obtained in other operating

environments may vary.

While the information contained herein is believed to be accurate, such information is preliminary, and should not be

relied upon for accuracy or completeness, and no representations or warranties of accuracy or completeness are made.

Note:

This document contains information on products in the sampling and/or initial production phases of

development. This information is subject to change without notice. Verify with your IBM field applications

engineer that you have the latest version of this document before finalizing a design.

THE INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED ON AN “AS IS” BASIS. In no event will IBM be

liable for damages arising directly or indirectly from any use of the information contained in this document.

IBM Microelectronics Division

1580 Route 52, Bldg. 504

Hopewell Junction, NY 12533-6351

The IBM home page can be found at

http://www.ibm.com

The IBM Microelectronics Division home page

can be found at

http://www-3.ibm.com/chips/

Title_750FX_DS_DD2.X.fm.2.0

June 9, 2003

Preliminary

Preliminary

Datasheet

DD 2.X

PowerPC 750FX RISC Microprocessor

1. General Information .................................................................................................... 3

1.1 Features ............................................................................................................................................

1.2 Design Level Considerations and Features ......................................................................................

1.3 Processor Version Register ..............................................................................................................

1.4 Part Number Information ...................................................................................................................

2. Overview ...................................................................................................................... 7

2.1 Block Diagram ................................................................................................................................... 7

2.2 General Parameters .......................................................................................................................... 8

3. Electrical and Thermal Characteristics ..................................................................... 9

3.1 DC Electrical Characteristics ............................................................................................................. 9

3.2 Clock AC Specifications .................................................................................................................. 13

3.3 Spread Spectrum Clock Generator (SSCG) ................................................................................... 14

3.5 60x Bus Output AC Specifications .................................................................................................. 17

3.6 Alternate I/O Timing For 3.3V Bus .................................................................................................. 19

3.6.1 IEEE 1149.1 AC Timing Specifications ................................................................................. 20

4. Dimensions and Signal Assignments ..................................................................... 22

4.1 Module Substrate Decoupling Voltage Assignments ...................................................................... 22

4.2 Package .......................................................................................................................................... 22

4.3 Microprocessor Ball Placement ....................................................................................................... 24

5. System Design Information ..................................................................................... 31

5.1 PLL Considerations .........................................................................................................................

5.1.1 Restrictions and Considerations for PLL Configuration .........................................................

5.1.1.1 Configuration Restriction on Frequency Transitions ......................................................

5.1.2 PLL_RNG[0:1] Definitions for Dual PLL Operation ................................................................

5.1.3 PLL Configuration ..................................................................................................................

5.2 PLL Power Supply Filtering .............................................................................................................

5.3 Decoupling Recommendations .......................................................................................................

5.4 Output Buffer DC Impedance ..........................................................................................................

5.4.1 Input-Output Usage ...............................................................................................................

5.5 Level Protection ..............................................................................................................................

5.6 64 or 32-Bit Data Bus Mode ............................................................................................................

5.7 IIO Voltage Mode Selection ............................................................................................................

5.8 Thermal Management .....................................................................................................................

5.8.1 Heat Sink Selection Example ................................................................................................

5.8.2 Internal Package Conduction ................................................................................................

5.8.3 Minimum Heat Sink Requirements ........................................................................................

5.8.4 Heat Sink Mounting ...............................................................................................................

5.8.5 Thermal Assist Unit ...............................................................................................................

5.8.6 Adhesives and Thermal Interface Materials ..........................................................................

5.8.7 Thermal Interface and Adhesive Vendors .............................................................................

5.8.8 Heat Sink Vendors .................................................................................................................

Revision Log ................................................................................................................ 59

750FX_DS_DD2.X_V2.02.fm.2.0

June 9, 2003

Page 1 of 63

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