ruggedized device design, ultra low on-resistance and
cost-effectiveness.
Product Summary
CH
N
P
BV
DSS
(V)
30
-30
R
DS(ON)
(mΩ)
28
50
I
D
(A)
7
-5.3
Pin Assignments
Pin Descriptions
Pin Name
Description
Source (NMOS)
Gate (NMOS)
Drain (NMOS)
Source (PMOS)
Gate (PMOS)
Drain (PMOS)
S1
G1
S2
G2
1
2
3
4
8
7
6
5
D1
D1
D2
D2
SO-8 / PDIP-8
S1
G1
D1
S2
G2
D2
Ordering information
A X
Feature
F :MOSFET
PN
8958C X X X
Package
S: SO-8
N: PDIP-8
Lead Free
Blank : Normal
L : Lead Free Package
Packing
Blank : Tube or Bulk
A : Tape & Reel
This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of
this product. No rights under any patent accompany the sale of the product.
Rev. 1.2 Sep 13, 2005
1/9
AF8958C
N and P-Channel Enhancement Mode Power MOSFET
Absolute Maximum Ratings
Symbol
V
DS
V
GS
I
D
I
DM
P
D
T
STG
T
J
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
(Note 1)
Pulsed Drain Current
(Note 2)
Total Power Dissipation
Linear Derating Factor
Storage Temperature Range
Operating Junction Temperature Range
N-Channel P-Channel
30
-30
±20
±20
T
A
=25ºC
7
-5.3
T
A
=70ºC
5.8
-4.7
20
-20
T
A
=25ºC
2
0.016
-55 to 150
-55 to 150
Units
V
A
A
W
W/ºC
ºC
ºC
Thermal Data
Symbol
R
θJA
Parameter
Thermal Resistance Junction-Ambient
(Note 1)
Max.
Value
62.5
Units
ºC/W
Electrical Characteristics
(T
J
=25ºC unless otherwise specified)
Symbol
BV
DSS
Parameter
Drain-Source breakdown Voltage
Test Conditions
V
GS
=0V, I
D
=250uA
V
GS
=0V, I
D
=-250uA
Reference to 25 ºC,
∆BV
DSS
/∆ Breakdown Voltage Temperature I
D
=1mA
Coefficient
T
J
Reference to 25 ºC,
I
D
=-1mA
V
GS
=10V, I
D
=7A
V
GS
=4.5V, I
D
=5A
Static Drain-Source
R
DS(ON)
On-Resistance
(Note 3)
V
GS
=-10V, I
D
=-5A
V
GS
=-4.5V, I
D
=-3A
V
DS
= V
GS
, I
D
=250uA
V
GS(th)
Gate-Threshold Voltage
V
DS
= V
GS
, I
D
=-250uA
V
DS
=10V, I
D
=7A
g
fs
Forward Transconductance
V
DS
=-10V, I
D
=-5A
T
J
=25ºC V
DS
=30V, V
GS
=0V
Drain-Source Leakage T
J
=70ºC V
DS
=24V, V
GS
=0V
I
DSS
Current
T
J
=25ºC V
DS
=-30V, V
GS
=0V
T
J
=70ºC V
DS
=-24V, V
GS
=0V
I
GSS
Q
g
Q
gs
Q
gd
Gate-Source Leakage
Total Gate Charge
(Note 3)
Gate-Source Charge
Gate-Drain (“Miller”) Charge
V
GS
=±20V
N-Channel
V
DS
=24V, V
GS
=4.5V
I
D
=7A
P-Channel
V
DS
=-24V, V
GS
=-4.5V
I
D
=-5A
CH
N
P
N
P
N
P
N
P
N
P
N
P
N
P
N
P
N
P
N
P
Limits
Min.
Typ.
30
-
-30
-
-
-
-
-
-
-
1
-1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.02
-0.03
-
-
-
-
-
-
13
9
-
-
-
-
-
-
9
9
2
2
5
5
Max.
-
-
-
V/ºC
-
28
42
50
90
3
-3
-
-
1
25
-1
-25
±100
±100
15
15
-
-
-
-
mΩ
Unit
V
V
S
uA
nA
nC
Anachip Corp.
www.anachip.com.tw
2/9
Rev. 1.2
Sep 13, 2005
AF8958C
N and P-Channel Enhancement Mode Power MOSFET
Electrical Characteristics
(T
J
=25ºC unless otherwise specified)
Symbol
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
R
g
Parameter
Turn-On Delay Time
(Note 3)
Rise Time
Turn-Off Delay Time
Fall-Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Test Conditions
N-Channel
V
DS
=15V, V
GS
=10V
I
D
=1A, R
G
=3.3Ω,
R
D
=15Ω
P-Channel
V
DS
=-15V, V
GS
=-10V
I
D
=-1A, R
G
=6Ω,
R
D
=15Ω
N-Channel
V
GS
=0V, V
DS
=25V
f=1.0MHz
P-Channel
V
GS
=0V, V
DS
=-25V
f=1.0MHz
f=1.0MHz
CH
N
P
N
P
N
P
N
P
N
P
N
P
N
P
N
P
Limits
Min.
Typ.
-
6
-
10
-
5
-
7
-
19
-
27
-
5
-
16
-
645
-
460
-
150
-
180
-
95
-
130
-
1.6
-
9
Max.
-
-
-
-
-
-
-
-
1030
730
-
-
-
-
2.5
14
Unit
ns
pF
Ω
Source-Drain Diode
Symbol
V
SD
t
rr
Q
rr
Parameter
Forward On Voltage
(Note 3)
Reverse Recovery Time
(Note 3)
Reverse Recovery Charge
2
Test Conditions
I
S
=1.7A, V
GS
=0V
I
S
=-1.7A, V
GS
=0V
N-Channel
I
S
=7A, V
GS
=0V
dl/dt=100A/µs
P-Channel
I
S
=-5A, V
GS
=0V
dl/dt=-100A/µs
CH
N
P
N
P
N
P
Limits
Min.
Typ.
-
-
-
-
-
16
-
-
-
21
10
18
Max.
1.2
-1.2
-
-
-
-
Unit
V
ns
nC
Note 1:
Surface Mounted on 1 in copper pad of FR4 board, t
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